# J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis," Proc. Design Automation Conf., pp. 6366, June 1996.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....in C, and did experiments on a Sun SPARC 20 with 64 MB real memory, running Sun OS R.5.4. We used two groups of benchmark graphs as our test suite 2 . The first group of graphs were obtained from the high level synthesis benchmarks. The second group consists of signal transition graphs used in [14], 15] Tab. II presents the size of each test case and the experimental results in terms of the number of vertices and arcs visited and the running time. In the table, the first group consists of the first 8 graphs (whose names are capitalized) and the second group consists of the rest of the ....

J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Methodology and tools for state encoding in asynchronous circuit synthesis", in Proc. of the 33rd Design Automation Conference. ACM/IEEE, 1996, pp. 63--66.

....in C, and did experiments on a Sun SPARC 20 with 64 MB real memory, running Sun OS R.5.4. We used two groups of benchmark graphs as our test suite 1 . The first group of graphs were obtained from the high level synthesis benchmarks. The second group consists of signal transition graphs used in [16], 17] Tab. II presents the size of each test case and the experimental results in terms of the number of vertices and arcs visited and the running time. In the table, the first group consists of the first 8 graphs (whose names are capitalized) and the second group consists of the rest, 42 ....

J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Methodology and tools for state encoding in asynchronous circuit synthesis", in Proc. 33rd Design Automation Conf. ACM/IEEE, 1996, pp. 63--66.

.... Apart from interaction with the designer, which is a major motivation for this work, we also address the issue of extracting explicit causal relations in order to be able to apply analysis and synthesis techniques which rely on explicit causality and concurrency information ( 45] 29] In [14] [15], we showed that regions, sets of states corresponding to places in PNs, are tightly connected with properties that must be preserved across the state encoding process for asynchronous circuits. Hence, regions and their intersections can be efficiently used for state signal insertion and, ....

# J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev, "Methodology and Tools for State Encoding in Asynchronous Circuit Synthesis," Proc. Design Automation Conf., pp. 6366, June 1996.

....technology mapping to a target library. The final net list is guaranteed to be speed independent, i.e. hazard free under any distribution of gate delays and multiple input changes satisfying the initial specification. The tool has been used for synthesis of PNs and PNs composition [10] synthesis [7, 8, 9] and re synthesis [29] of asynchronouscontrollers and can be also applied in areas related with the analysis of concurrent programs. This paper provides an overview of petrify and the theory behind its main functions. 1 Introduction Petri nets [26, 30] are a widespread formalism to model ....

....a designer to play with a PN like specification, performing equivalent transformations of PNs, and or transformations of other specifications into PNs under different design constraints and optimization criteria. Figure 1 shows our framework for synthesizing PNs and transforming specifications. In [7, 8, 9] we show that regions are tightly connected with the set of properties that must be preserved across the state encoding and technology mapping process for asynchronous circuits. Hence, regions and their intersections can be efficiently used for state signal insertion. Therefore, sets of states ....

J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Methodologyand tools for state encoding in asynchronous circuit synthesis. In Proceedings of the Design Automation Conference, pages 63--66, June 1996.

....lies. Apart from interaction with the designer, which is a major motivation for this work, we also address the issue of extracting explicit causal relations in order to be able to apply analysis and synthesis techniques which rely on explicit causality and concurrency information ( 45] 29] In [14, 15] we show that regions, sets of states corresponding to places in PNs, are tightly connected with properties that must be preserved across the state encoding process for asynchronous circuits. Hence, regions and their intersections can be efficiently used for state signal insertion and, therefore, ....

J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Methodology and tools for state encoding in asynchronous circuit synthesis. In Proceedings of the Design Automation Conference, pages 63--66, June 1996.

....mapping to a target library. The final net list is guaranteed to be speed independent, i.e. hazard free under any distribution of gate delays and multiple input changes satisfying the initial specification. The tool has been used for synthesis of PNs and PNs composition [10] synthesis [7, 9, 8] and re synthesis [29] of asynchronous controllers and can be also applied in areas related with the analysis of concurrent programs. This paper provides an overview of petrify and the theory behind its main functions. 1 Introduction Petri nets [30, 26] are a widespread formalism to model ....

....a designer to play with a PN like specification, performing equivalent transformations of PNs, and or transformations of other specifications into PNs under different design constraints and optimization criteria. Figure 1 shows our framework for synthesizing PNs and transforming specifications. In [7, 9, 8] we show that regions are tightly connected with the set of properties that must be preserved across the state encoding and technology mapping process for asynchronous circuits. Hence, regions and their intersections can be efficiently used for state signal insertion. Therefore, sets of states ....

J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Methodology and tools for state encoding in asynchronous circuit synthesis. In Proceedings of the Design Automation Conference, June 1996. to appear.

....a designer to play with a PN like specification, performing equivalent transformations of PNs, and or transformations of other specifications into PNs under different design constraints and optimization criteria. Fig. 1 shows our framework for synthesizing PNs and transforming specifications. In [8, 10, 9] we show that regions are tightly connected with the set of properties that must be preserved across the state encoding and technology mapping process for asynchronous circuits. Hence, regions and their intersections can be efficiently used for state signal insertion. Therefore, sets of states ....

J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Methodology and tools for state encoding in asynchronous circuit synthesis. In Proceedings of the Design Automation Conference, June 1996. to appear.

....lies. Apart from interaction with the designer, which is a major motivation for this work, we also address the issue of extracting explicit causal relations in order to be able to apply analysis and synthesis techniques which rely on explicit causality and concurrency information ( 36] 22] In [10, 12] we show that regions sets of states corresponding to places in PNs, are tightly connected with the set of properties that must be preserved across the state encoding process for asynchronous circuits. Hence, regions and their intersections can be efficiently used for state signal insertion. ....

....remains the same. 6 Applications Several applications for the methodology presented in this paper have been outlined in Section 1. In this section, we illustrate some of these applications by means of practical examples. Other examples, in the area of asynchronous circuit design, can be found in [12] and [11] circuit signals states places transitions arcs markings CPU (secs) unsafe 5 22 17 12 46 22 0.7 a4 tflo1 8 20 17 16 40 20 0.2 a 10 dr2 50 9408 93 100 336 9408 1582.4 a 11 sen 19 85 38 38 93 85 4.6 dags55 19 130 33 38 187 130 54.9 Table 2: Synthesis of Petri nets from speed independent ....

J. Cortadella, M. Kishinevsky, A. Kondratyev, L. Lavagno, and A. Yakovlev. Methodology and tools for state encoding in asynchronous circuit synthesis. In Proc. of the 33rd. Design Automation Conference, June 1996.

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