Flaig, C. M. VLSI Mesh Routing Systems California Institute of Technology, Computer Science 5241:TR:87, May 1987.

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An Integration of Network Communication with Workstation.. - Finn (1994)   (17 citations)  (Correct)

....position relative and 4 For comparison, an interface to the 32 bit variant Futurebus backplane may require ten chips. Source: National Semiconductor, National Anthem vol. 23, March April 1991, pp. 3. 5 March 1991 1 2 3 4 5 6 8 9 7 Figure 2. deadlock free [12] 13][14]. The path a message takes is determined by a two byte prefix, each specifying a hop count and a direction. Hop counts are decremented as they pass through each router. A message may be forwarded 127 hops in the X direction followed by 127 hops in the Y direction. Messages are forwarded ....

Flaig, C. M. VLSI Mesh Routing Systems California Institute of Technology, Computer Science 5241:TR:87, May 1987.

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