D. Drusinski and D. Har'el. Using statecharts for hardware description and synthesis. IEEE Transactions on Computer-Aided Design, 8(7), July 1989.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....specify system dynamics only. Both Statecharts and Modecharts are based on Finite State Machines, but they are also capable of hierarchical and structural decomposition into sub states, which may coexist in parallel or exhibit an exclusive or (XOR) relationship. Statecharts have been extended in [3] so as to express quantitative timing constraints. STATEMATE [6] the graphical tool which implements Statecharts, has an automated simulation tool that allows the user to execute his her model. Modecharts [8] are capable of expressing quantitative sporadic and periodic timing constraints. Their ....

Drusinsky, D. and Harel, D. Using Statecharts for Hardware Description and Synthesis. IEEE Transactions on Computer-Aided Design 8, 7 (July 1989), 798-807.

....by a single transition. The size di#erences reflect the sizes of runtime engines. The hierarchical library seems to be only slightly bigger. The version of the library using flag based encoding is smaller than the one for set based encoding as the logics involved is much simpler. Drusinsky89 [5] and lift show that the size of code produced by SCOPE is comparable to that of IAR visualstate for small models. The di#erence seems to be acceptable. The latter of the two, lift, is a flat statechart (a set of concurrent state machines) It demonstrates the performance strength of flattening ....

D. Drusinsky and D. Harel. Using statecharts for hardware description and synthesis. IEEE Transactions on Computer Aided Design, 8(7):798--807, 1989.

....synthesis oriented use of MoDe models is straightforward and can be built on existing technology. Being a synchronous formalism, AutoFOCUS leads itself naturally to both software [4] or hardware synthesis, similar to other synchronous formalisms such as SpecCharts [17] Esterel [3] or Statecharts [8]. An integrated simulation tool should allow interactive simulation of the system model while instrumenting the design with the logical and technical views on the system. When realized, we expect this option to help users evaluate models while retaining their original abstractions. Quite ....

D. Drusinsky and D. Harel. Using statecharts for hardware description and synthesis. IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, 8(7):798--807, July 1989.

....that Hardware Description Languages (HDL) is already a standard IDR for the architecture of an embedded system. This includes languages L such as Verilog [85] VHDL [73] or SpecC [42] where the specification is given in terms of concurrent processes. On the contrary, MoCs such as StateCharts [30, 51] are conceptually best suited for the representation of embedded system models, but suffers from being difficult to employ by the designer. Both forms of IDR, i.e. either textual or graphical based, have two well defined parts in order to undertake the statical and dynamical analysis of the ....

Doron Drusinsky and David Harel. Using Statecharts for Hardware Description and Synthesis. IEEE Transaction on Computer-Aided Design of Integrated Circuits and Systems, 8(7):798--807, July 1989.

....to syntax elements of a hierarchical system. This is a common thing, yet still contrasting with alternatives based on flattening. It is possible to give semantics and implementation of hierarchical model in terms of flattening to a set of plain Mealy machines having a well known semantics (see [17, 1, 3, 4] and others) Hierarchical semantics can be used both to create hierarchy aware implementations of statecharts and to prove correctness of flattening algorithms (and thus support flattening based implementations) Last but not least, the semantics given here is global, which means that it lacks ....

Drusinsky, D., and Harel, D. Using statecharts for hardware description and synthesis. IEEE Transactions on Computer Aided Design 8, 7 (1989), 798--807.

....more concrete semantics should o er information useful for tasks such as the following ones: Improvement of hardware implementation. Implementation of synchronous programs on circuits guarantees short reaction times. Examples of implementations of synchronous languages in hardware are in [12, 28, 2, 25]. States of circuits correspond to program con gurations, and one clock executions of circuits correspond to program reactions. Circuits can be either synthesized from FSMs corresponding to programs by means of classical techniques, as in [25] or synthesized compositionally w.r.to the structure ....

Drusinsky, D. and Harel, D.: \Using Statecharts for hardware description and synthesis", IEEE Transactions on Computer-Aided Design, 8, 1989, 798-807.

....the sense that a fork join can be implemented using nested processes and vice versa. 3.4 State transitions Systems are often best conceptualized as having various modes, or states, of behavior, as in the case of controllers and telecommunication systems. For example, a traffic light controller [DH89] might incorporate different modes for day and night operation, for manual and automatic functioning, and for the status of the traffic light itself. In systems with various modes, the transitions between these modes sometimes occur in an unstructured manner, as opposed to a linear sequencing ....

....Another example of control dependent synchronization is the technique of initialization, in which processes are synchronized to their initial states either the first time the system is initialized, as is the case with most HDLs, or during the execution of the processes. In the Statecharts [DH89] of Figure 36(c) we can see how the event e, associated with a transition arc that reenters the boundary of ABC, is designed to synchronize all the orthogonal states A, B and C into their default substates. Similarly, in Figure 36(d) event e causes B to initialize to its default substate B1 ....

D. Drusinsky, D. Harel. "Using Statecharts for hardware description and synthesis ". In IEEE Transactions on Computer Aided Design, 1989.

....Irvine Exploration Weld UC Berkeley Framework For the specification of embedded systems, standard programming languages are being used, as well as special languages developed to support important concepts in codesign directly. For the latter, two early approaches must be mentioned. Statecharts [7, 15] and SpecCharts [29, 10] use an extended finite state machine model in order to support hierarchy, concurrency and other common concepts. Both have a textual and a graphical representation. SpecCharts is the underlying language being used in the SpecSyn system [11] which is targeted at design ....

D. Drusinsky and D. Harel. "Using Statecharts for hardware description and synthesis ". In IEEE Transactions on Computer Aided Design, 1989. 38

....sense that 3 a fork join can be implemented using nested processes and vice versa. 2.2 State transitions Systems are often best conceptualized as having various modes, or states, of behavior, as in the case of controllers and telecommunication systems. For example, a traffic light controller [DH89] might incorporate different modes for day and night operation, for manual and automatic functioning, and for the status of the traffic light itself. In systems with various modes, the transitions between these modes sometimes occur in an unstructured manner, as opposed to a linear sequencing ....

....executed. Another example of control dependent synchronization is the technique of initialization, in which processes are synchronized to their initial states either the first time the system is initialized, as is the case with most HDLs, or during the execution of the processes. In the Statechart [DH89] of Figure 13(c) we can see how the event e, associated with a transition arc that reenters the boundary of ABC, is designed to synchronize all the orthogonal states A, B and C into their default substates. Similarly, in Figure 13(d) event e causes B to initialize to its default substate B1 ....

D. Drusinsky and D. Harel. "Using Statecharts for hardware description and synthesis". In IEEE Transactions on Computer Aided Design, 1989.

....are not always called like this. The adequate proof principle is coinduction which can be used in abstract state machines without any problems as demonstrated in this paper. To fully exploit the coinductive definition principle, one can put ASMs hierarchically together, analogous to StateCharts [Har87, DH89]. Then coinduction is the method of choice to define the composition semantically as well as to prove properties of it. Acknowledgements We want to thank the people in the Verifix Projekt for many helpful discussions on coinduction, especially Axel Dold, Wolfgang Goerigk, Gerhard Goos and ....

D. Drusinsky and D. Harel. Using statecharts for hardware description and synthesis. IEEE Trans. on Computer Design, 1989.

....states. Global communication is achieved by sending events which influence the state transition of FSM somewhere else in the system. This construction scheme creates a tree of FSMs which can be seen as an image of top down system design. A more complete description of Statecharts can be found in [DH89]. A subset of the Statecharts formalism is supported by the commercial tool SPeeDCHART [Dar93] The process of specifying a circuit with SPeeDCHART is structured hierarchically: at each level of hierarchy several AND states, which may interact with each other, can be specified. Each state in the ....

D. Drusinsky, D. Harel, Using Statecharts for Hardware Description and Synthesis, IEEE Transactions on Computer-Aided Design, vol. 8, no. 7, pp. 798-806, July 1989.

....specify system behavior only. Both Statecharts and Modecharts are based on Finite State Machines, but they are also capable of hierarchical and structural decomposition into sub states, which may coexist in parallel or exhibit an exclusive or (XOR) relationship. Statecharts have been extended in [13], so as to express quantitative timing constraints. STATEMATE [2] the graphical tool which implements Statecharts, has an automated simulation tool that allows the user to execute his her model. Modecharts [8] are capable of expressing quantitative sporadic and periodic timing constraints. Their ....

Drusinsky, D. and Harel, D., Using Statecharts for Hardware Description and Synthesis IEEE Transactions on Computer-Aided Design Vol 8 No 7, 798-807 (July 1989).

....this claim. We compared OPM T [2] OPM [3] with temporal extension) a graphic object oriented system specification method, which is unique in its ability to specify the structural, functional and dynamic aspects of systems in a single model, with T OMT (Timed OMT) a temporal extension of OMT [4 6], which was selected as a representative of 2 multiple model methods. The core of this research is a controlled experiment, aimed at demonstrating the model multiplicity problem through a comparison between the two methods. For the sake of brevity we refer to the two methods compared as OPM and ....

D. Drusinsky, and D. Harel, "Using Statecharts for Hardware Description and Synthesis", IEEE Transactions on Computer-Aided Design, Vol. 8 , No. 7, 1989.

....y Verimag is a joint laboratory of CNRS, Institut National Polytechnique de Grenoble, Universite J. Fourier and Verilog SA associated with IMAG. guages [11] have been shown to be very convenient for circuit description, and silicon compilers have been proposed that take such languages as input [1, 18, 10]. Synchronous languages are based on the idea that a system is made of a set of concurrent, deterministic, reactive processes, that communicate by instantaneous broadcast of signals. A well known problem with such a powerful communication mechanism is the existence of instantaneous looping ....

D. Drusinsky and D. Harel. Using Statecharts for hardware description and synthesis. IEEE Trans. on Computer-Aided Design, 8(7):798-- 807, July 1989.

....[6] for the specication of complex systems consisting of components running in parallel, reacting to prompts from an environment, and interacting with each other by broadcast. Statecharts have been successfully used to specify hardware components, communication networks, operating systems (e.g. [5, 7]) Statecharts are state transition diagrams enriched by a tree like structuring of states, explicit representation of parallelism and communication among parallel components. States are either of type AND, AND states, used to describe parallel behaviours, or of type OR, OR states, used to ....

Drusinsky, D., Harel, D.: Using Statecharts for Hardware Description and Synthesis, IEEE Transactions on Computer-Aided Design 8 (1989), pp. 798807.

....larger is the computing time consumed. This time can be significant if the simulation is structural where it may vary from 10 to 100 million of gates and this time grows in logarithm scale. Some of these languages are HardwareC [Ku and De Micheli (1988) VHDL [Lipsett et al. 1989) Statecharts[Drusinsky and Harel (1989)] Silage [Hilfinger and Rabey (1992) 1 Universidade Federal de So Carlos So Carlos SP BRAZIL 2 Escola Politcnica da USP So Paulo SP BRAZIL 2 SpecCharts language [Vahid et al. 1991) Verilog [Sternheim et al. 1990) and SDL [Belina and Sarma (1991) Although VHDL is ....

- Drusinsky, D. and Harel, D. - "Using Statecharts for Hardware Description and Synthesis", IEEE Transactions on Computer-Aided Design, 1989, p. 798-807.

....module has it s own architecture, which may be another flexible architecture, i.e. another control unit and set of functional modules. The leaves in the architectural hierarchy contain functional modules that have fixed architectures. This representation is similar to the one proposed in [2] for the implementation of hierarchical Statechart descriptions. 2.1 Architectural Characteristics Both fixed and flexible architecture representations characterize the physical parameters of an implementation. The common characteristics are: ffl Port declarations. ffl Estimated area ....

Doron Drusinsky and David Harel. Using statecharts for hardware description and synthesis. IEEE Transactions on Computer Aided Design, 8(7), July 1989.

....large systems. The Statemaster system [26] provides this kind of support for the construction of user interfaces (a similar use of statecharts is made in [25] Statecharts are as well used as a graphical notation in objectoriented software development methodologies [4, 24] and in hardware design [5]. A great number of efforts directed towards its formal semantic specification and extension proposals [13, 14, 16, 17, 18, 19, 21, 22] show signs of a vivid interest in this particular notation. A Statechart Engine to Support Implementations of Complex. 3 This work sees the statechart ....

Doran Drusinsky and David Harel. Using Statecharts for Hardware Description and Synthesis. IEEE Transactions on Computer Aided Design, 8(7):798--807, July 1989.

....delay element. It is the only part of the statechart formalism actually extending it beyond the limitations imposed by classical finite state automata. On the other hand, its power is exemplified by the fact that it is extensively used in real time related applications, e.g. VLSI specification [DH89]. Due to the introduction of timers the semantics of the full statechart formalism has to be defined using temporal constructs (such as e.g. timed traces or timed automata) 3.2 Behaviour languages vs. statecharts We have chosen statecharts as the target formalism for semantical analysis of ....

Doron Drusinsky and David Harel. Using Statecharts for Hardware Description and Synthesis. IEEE Transactions on Computer-Aided Design, 8(7):798--807, July 1989.

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D. Drusinski and D. Har'el. Using statecharts for hardware description and synthesis. IEEE Transactions on Computer-Aided Design, 8(7), July 1989.

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D. Drusinsky and D. Harel, `Using Statecharts for hardware description and synthesis', IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, 8, (7), 798--807 (1989).

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D. Drusinsky, D. Harel, "Using Statecharts for Hardware Description and Syntesis", IEEE Transactions on Computer-Aided Design, Vol. 8 (7), pp.798-806, 1989.

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D. Drusinsky and D. Harel. "Using Statecharts for hardware description and synthesis". In IEEE Transactions on Computer Aided Design, 1989.

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D. Druinsky, D. Harel, "Using State-Charts for hardware Description and Synthesis, IEEE Trans. on CAD, Vol. 8, No.7, July, 1989, pp.798-807

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D. Drusinsky and D. Harel. "Using Statecharts for hardware description and synthesis". In IEEE Transactions on Computer Aided Design, 1989.

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