| W. Hung, "Exploiting Symmetry for Formal Verification, " Master's thesis, The University of Texas at Austin, May 1997. |
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W. Hung, "Exploiting Symmetry for Formal Verification, " Master's thesis, The University of Texas at Austin, May 1997.
....of FSMs in [4] A netlist is a representation of a design at the structural level. It is closer to the actual implementation of the design than FSMs, which can be viewed as behavioral level descriptions of the design [5] Precise description of finite state machines and netlists are given in [6]. 3 Lower Bounding the Complexity of BDD Based Invariant Checking We show that there is no variable ordering under which a polynomial sized Reduced Ordered Binary Decision Diagram can be built for the characteristic function of the set of permutations; this implies that a straightforward ....
....is a permutation of f0; 1; N Gamma 1g, that is for each p 2 f0; 1; N Gamma 1g, there is a k so that p = ak . Lower Bounding the BDD Size Theorem 3.1 The BDD for fN has at least 2 N=2 nodes, under any variable ordering. The proof is available in the technical report [6]. This suggests that BDDs are not a good data structure for reachability analysis for highly symmetric systems. An example for BDD explosion is a multiprocessor network, where each processor has multiple memory units, shown in Figure 1. For many randomized routing protocols, the set of states this ....
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W. Hung, "Exploiting Symmetry for Formal Verification, " Master's thesis, The University of Texas at Austin, May 1997.
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