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DAVIDSON, S.; et al.. Some Experiments in Local Microcode Compaction for Horizontal Machines. IEEE Transactions on Computers, Vol. C-30, No. 7, pp. 460-477, 1981.

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Embedded Software in Real-Time Signal Processing.. - Goossens, Van.. (1997)   (11 citations)  (Correct)

....blocks in the algorithmic specification. 1) Local Versus Global Scheduling: A local scheduler is a scheduler that operates at the level of basic blocks (i.e. linear sequences of code without branching) in the intermediate representation. A well known local scheduling technique is list scheduling [80]. More recently, in the context of embedded processors, integer programming based scheduling formalisms have been described [81] 83] When the architecture has only a restricted amount of instruction level parallelism, a local scheduling approach may already produce efficient results. Note ....

S. Davidson et al., "Some experiments in local microcode compaction for horizontal machines," IEEE Trans. Computers, vol. C-30, no. 7, pp. 460--477, July 1981.


Software Synthesis and Code Generation for Signal.. - Bhattacharyya.. (1999)   (5 citations)  (Correct)

....steps. The code compaction problem has already been studied in the early eighties within the context of very long instruction word (VLIW) processors, showing a large degree of parallelism at the instruction level. A number of different compaction heuristics have been developed for VLIW machines [76]. However, even though PDSPs resemble VLIW machines to a certain extent, VLIW compaction techniques are not directly applicable to PDSPs. The reason is that instruction level parallelism (ILP) is typically much more constrained in PDSPs than in VLIWs, because using VLIWs for PDSPs would lead to ....

S. Davidson, D. Landskov, B. D. Shriver, and P. W. Mallett, "Some experiments in local microcode compaction for horizontal machines," IEEE Trans. Comput., vol. C-30, pp. 460--477, 1981.


A Compiler for Application-Specific Signal Processors - Rimey (1988)   (10 citations)  (Correct)

....to get al..most the same speed up. These techniques are illustrated in Figures 1.4 through 1.6. Fisher, Landskov, and Shriver s paper [18] is a good introduction to compaction in general. Algorithms for local compaction are surveyed by Landskov et al. 25] Fisher [15] and Davidson et al. [12] conducted experiments to compare them, concluding that simple greedy algorithms with good heuristics perform almost as well as more complex algorithms and even exhaustive search. Since local compaction is now so well understood, the research community has largely shifted its attention to software ....

Scott Davidson, David Landskov, Bruce D. Shriver, and Patrick Wayne Mallett. Some experiments in local microcode compaction for horizontal machines. IEEE Transactions on Computers, C-30(7):460-477, July 1981.


Timing Analysis, Scheduling, and Allocation of Periodic Hard.. - Altenbernd (1996)   (3 citations)  (Correct)

....decisions. Other approaches [35, 71] allow to rerun the algorithm (or parts of it) with modified parameters. Most of the approaches use pre clustering techniques to further reduce problem size. Methods based upon List Processing are also often used for optimising compilers for parallel machines [30]. If used without backtracking or a rerun policy, List Processing is very fast, of course with the risk of not having found any feasible solution, or resulting in a poor allocation objective function value. List Processing is very sensitive to the implementation of the priority function, and to ....

S. Davidson, D. Landskov, B. D. Shriver, and P. W. Mallett. Some Experiments in Local Microcode Compaction for Horizontal Machines. IEEE Transactions on Computers, 30(7):460--477, July 1981.


Boosting Beyond Static Scheduling in a Superscalar Processor - Smith, Lam, Horowitz (1990)   (63 citations)  (Correct)

....simple scheduler. The simple scheduler only boosts instructions up through a single conditional branch and reorganizes instructions up through a single unconditional branch. The simple scheduler compacts static basic blocks only individually or in pairs. Each basic block is list 7 scheduled [6] given the current hardware constraints (the number of functional units and the number of instructions in a fetch block, for instance) and the program semantics. The scheduling between basic block pairs is accomplished by first list scheduling the dynamically preceding basic block and then list ....

S. Davidson, D. Landskov, B. Shriver, and P.W. Mallett, "Some Experiments in Local Microcode Compaction for Horizontal Machines". IEEE Transactions on Computers Vol. C-30 (July 1981), pp. 460-477.


Data Dependence Analysis of Assembly Code - Amme, Braun, Zehendner, Thomasset   (5 citations)  (Correct)

....and optimizing compiler systems on the level of source code, e.g. C or FORTRAN 90, or some intermediate code, e.g. RTL [21] Data dependence analysis on the level of assembly code aims at increasing instruction level parallelism. Using various scheduling techniques like list scheduling [6], trace scheduling [9] or percolation scheduling [17] a new sequence of instructions is constructed with regard to data and control dependences, and properties of the target processor. Most of today s instruction schedulers only determine data dependences between register accesses and consider ....

S. Davidson, D. Landskov, B. D. Shriver, and P. W. Mallet. Some experiments in local microcode compaction for horizontal machines. IEEE Trans. on Computers, 30(7):460-- 477, July 1981.


Loop Pipelining for Scheduling Multi-dimensional Systems via .. - Passos, Sha, Bass (1993)   (3 citations)  (Correct)

....and then rescheduled to its new position, resulting in an optimal schedule with length 8. Figure 3(b) shows the final graph, where the two dimensional delay (0; 1) was pushed through node M7. The multi dimensional rotation scheduling method uses a DAG scheduling algorithm, such as list scheduling [4] as a subroutine. Notice that only part of the MDFG is rescheduled in each rotation, saving computation time. The next section establishes some of the basic concepts to be used in this paper. Section 2 Note that (0; 1) is arbitrarily chosen here. The vector (1; 0) is also possible, as are many ....

S. Davidson, D. Landskov, B. D. Shriver, and P. W. Mallett," Some Experiments in Local Microcode Compaction for Horizontal Machines". IEEE Transactions on Computers, C-30, 7, 1981, pp. 460-477.


Using Integer Linear Programming for Instruction Scheduling.. - Chang, Chen, King (1997)   (1 citation)  (Correct)

....ILP is because the technique has been applied successfully to problems in application domains such as high level synthesis for ASICs [15] Our work can build upon those results. In addition, with ILP the resultant code is better than or as good as that obtained by heuristics, e.g. list scheduling [1, 5]. Thus, the ILP solution can serve as a reference for other heuristic solutions. We will consider the optimization problem of solving instruction scheduling and register allocation simultaneously with and without register spilling. The goals of the ILP formulations are either to solve for the ....

S. Davidson, Some Experiments in Local Microcode Compaction for Horizontal Machines, IEEE Transactions on Computers, pp. 460-477, (1982).


Using Value Prediction to Increase the Power of.. - Freddy Gabbay Department (1998)   (8 citations)  (Correct)

.... dependencies) and control dependencies ( 21] 35] Neither control dependencies nor name dependencies are considered an upper bound on the extractable ILP since they can be handled (or even eliminated in several cases) by various hardware and software techniques ( 1] 2] 3] 4] 5] 6] [8], 9] 10] 12] 13] 14] 21] 22] 23] 24] 27] 29] 32] 33] 36] 37] 38] 39] As opposed to name dependencies and control dependencies, only true data dependencies are considered to be a fundamental limit on the extractable ILP, since they reflect the serial nature of a ....

S. Davidson, D. Landskov, B. D. Shriver and P. W. Mallet. Some Experiments in Local Microcode Compaction for Horizontal Machines. IEEE Transactions on Computers, Vol. C-30, no. 7, July, 1981, pp. 460-477.


Can Program Profiling Support Value Prediction? - Freddy Gabbay And (1997)   (47 citations)  (Correct)

.... name dependencies (false dependencies) and control dependencies ( 6] 7] 15] Both control dependencies and name dependencies are not considered an upper bound on the extractable ILP since they can be handled or even eliminated in several cases by various hardware and software techniques ([1], 2] 3] 6] 7] 8] 13] 14] 16] 17] As opposed to name dependencies and control dependencies, only true data dependencies were considered to be a fundamental limit on the extractable ILP since they reflect the serial nature of a program by dictating in which sequence data should be ....

S. Davidson, D. Landskov, B. D. Shriver and P. W. Mallet. Some Experiments in Local Microcode Compaction for Horizontal Machines. IEEE Transactions on Computers, Vol. C-30, no. 7, July, 1981, pp. 460-477.


Single Instruction Fetch Does Not Inhibit - Instruction-Level Parallelism..   (Correct)

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DAVIDSON, S.; et al.. Some Experiments in Local Microcode Compaction for Horizontal Machines. IEEE Transactions on Computers, Vol. C-30, No. 7, pp. 460-477, 1981.


On the Effectiveness of the Scheduling Algorithm - Of The Dynamically   (Correct)

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S. Davidson, et al., "Some Experiments in Local Microcode Compaction for Horizontal Machines", IEEE Transactions on Computers, Vol. C30, No. 7, pp. 460-477, July 1981.


DTSVLIW: VLIW Performance with Sequential - Code Alberto Ferreira   (Correct)

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S. Davidson, et al., "Some Experiments in Local Microcode Compaction for Horizontal Machines", IEEE Trans. on Computers, Vol. C-30, No. 7, pp. 460477, 1981.


Journal of Parallel and Distributed Computing 60.. - Dynamically Scheduling..   (Correct)

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S. Davidson, D. Landskov, B. D. Shriver, and P. W. Mallett, Some experiments in local microcode compaction for horizontal machines, IEEE Trans. Comput. 30, 7 (July 1981), 460#477.


A Comparative Analysis Between EPIC Static - Instruction Scheduling And   (Correct)

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Davidson, S.; et al. Some Experiments in Local Microcode Compaction for Horizontal Machines. IEEE Trans. on Computers, Vol. C-30, No. 7, pp. 460-477, 9 1981.


Effect of Multicycle Instructions on the Integer - Performance Of The   (Correct)

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S. Davidson, D. Landskov, B. D. Shriver, P. W. Mallett, "Some Experiments in Local Microcode Compaction for Horizontal Machines", IEEE Transactions on Computers, Vol. C30, No. 7, pp. 460-477, July 1981.


Improving DTSVLIW Performance via Block - Compaction Alberto De   (Correct)

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S. Davidson, et al., "Some Experiments in Local Microcode Compaction for Horizontal Machines", IEEE Trans. on Computers, Vol. C-30, No. 7, pp. 460477, 1981.


On the Scheduling Algorithm of the Dynamically Trace.. - Architecture Alberto..   (Correct)

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S. Davidson, et al., "Some Experiments in Local Microcode Compaction for Horizontal Machines", IEEE Trans. on Computers, Vol. C-30, No. 7, pp. 460-477, 1981.


Dynamically Trace Scheduled VLIW Architectures - Alberto Ferreira De   (Correct)

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S. Davidson, D. Landskov, B. D. Shriver, P. W. Mallett, "Some Experiments in Local Microcode Compaction for Horizontal Machines", IEEE Transactions on Computers, Vol. C30, No. 7, pp. 460-477, July 1981. 0 0.5 1 1.5 2 2.5 3 3.5 livermore integral quick lu bubble 4-4 4-8 4-16 8-4 8-8 8-16


Efficient Backtracking Instruction Schedulers - Abraham (2000)   (Correct)

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S. Davidson, et al., "Some experiments in local microcode compaction for horizontal machines," IEEE Trans. Computers, vol. C-30, no. 7, pp. 460-477, July 1981.


Register Allocation With Instruction - Scheduling New Approach   (Correct)

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S. Davidson, D. Landskov, B. D. Shriver and P. W. Mallett. Some experiments in local microcode compaction for horizontal machines, IEEE Transactions on Computers, C-30 (1981) 460#477.


Software Synthesis and Code Generation for Signal.. - Bhattacharyya.. (1999)   (5 citations)  (Correct)

No context found.

S. Davidson, D. Landskov, B.D. Shriver, P.W. Mallett. Some Experiments in Local Microcode Compaction for Horizontal Machines. IEEE Trans. on Computers, vol. 30, no. 7, 1981, pp. 460-477.


Using Conditional Execution to Exploit Instruction Level.. - Adams, Gray (1995)   (Correct)

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S. Davidson, D. Landskov, B. Shriver and P. W. Mallet, `Some experiments in local microcode compaction for horizontal machines', IEEE Trans. Comput., C-30, (7), 460--477 (1981).


Automata-Based Symbolic Scheduling - Haynal (2000)   (3 citations)  (Correct)

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S. Davidson, et al., "Some Experiments in Local Microcode Compaction for Horizontal Machines", IEEE Trans. Computers, pp. 460-477, July 1981.


Microcode Optimization with Neural Networks - Bharitkar, Tsuchiya, Takefuji (1999)   (Correct)

No context found.

S. Davidson, D. Landskov, B. D. Shriver, and P. W. Mallett, "Some experiments in local microcode compaction for horizontal machines," IEEE Trans. Comput., vol. C-30, pp. 460--477, July 1981.

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