Misra J., Axioms for Memory Access in Asynchronous Hardware Systems. ACM Transactions on Programming Languages and Systems, 8(1):142-153, 1986.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....depending on those properties there are diferent memory models. 3 Maybe the most useful and intuitive memory model is the Strict. Roughtly speaking, the strict memory model forces that each read operation to a given address returns the data of the most recently write operation at that address [11, 14]. The strict memory model provides strong guarantees for the memory access operations, being efficiently implementable in uniprocessor systems. The implementation of this type of memory in a multiprocessor system may, however, reduce the potential performance gains of the system. This memory ....

Misra, J. Axioms for Memory Access in Asynchronous Hardware Systems. ACM Transactions on Programming Languages and Systems, 8(1):142:153, Jan. 1986.

....[17, 20, 14, 3] address non atomic communication operations in the context of self stabilization. Lamport initially demonstrated that interprocess communication without explicity synchronization is possible [15] and formalizations of less than atomic communication were subsequently developed in [21, 16]. The register hierarchy and register constructions of [16] inspired and active research area. The register hierarchy (safe, regular, and atomic registers) has many motivations, including implementation cost for shared register operations. Another view of weaker forms of registers (safe or ....

J. Misra, \Axioms for memory access in asynchronous hardware systems," ACM Transactions on Programming Languages and Systems, vol. 8(1), 1986, pp. 142-153. Shlomi Dolev and Ted Herman

....problem [23] We show that the problem of checking whether a given history is m linearizable is also NP complete. This is true even when the reads from relation (de ned later) is known. Note that when the reads from relation is known, the linearizability can be checked in polynomial time [19]. We show that execution constraints proposed by Mizuno et al. [20] to ensure ecient implementation for sequential consistency can also be used for operations that span multiple objects. Speci cally, under these execution constraints, it is necessary and sucient to ensure legality of reads to ....

....Since our model is a generalization of the traditional DSM model, determining whether a given execution is m sequentially consistent is NP complete too. Misra proved that checking whether an execution satis es atomic consistency is solvable in polynomial time when reads from relation is known [19]. It turns out that this is not the case when the operations can encompass multiple objects. In this section we show that determining whether a given execution is m linearizable is an NP complete problem even when reads from relation is known. We will use the results in databases to prove the ....

Jayadev Misra. \Axioms for memory access in asynchronous hardware systems". ACM Transactions on Programming Language and Systems, 8(1):142-153, January 1986. 29

....p writes the value v into location x is denoted w p (x)v. Similarly, r p (x)v denotes a read operation in which process p obtains v when reading x. The value and process can be dropped when they are irrelevant. For the sake of simplicity, and without loss of generality, it is assumed, as in [23], that for a given location no two operations write the same value into it: a location and a value uniquely identify a write operation. 2 Q P Process Local Memory q Manager p Node s t Figure 1: Distributed system model. 2.2 Potential Causality and Causal Consistency Lamport [19] denes ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Trans. Prog. Lang. Syst., 8(1):142153, Jan. 1986.

....(i.e. to satisfy the consistency criterion) Serializability and the two phase locking protocol, mainly studied and used in the database field, are the best known examples of a consistency criterion and its associated implementation protocol. Traditional consistency criteria (namely, atomicity [Misr86], serializability [Bern87] and linearizability [Herl90] require that all processes have the same sequential view of the computation. These criteria have largely been studied. Even though they are natural and easy to use, their implementations are based on strong synchronization constraints that ....

J. Misra. "Axioms for Memory Access in Asynchronous Hardware Systems. " ACM Trans. on Programming Languages and Systems, 8(1) p. 142-153, 1986.

....is linearizable is also NP complete in our model. This is true even when the reads from relation (defined later) is known. Note that when the operations are restricted to a single read write register and the reads from relation is known, then linearizability can be checked in polynomial time [18]. We show that execution constraints proposed by Raynal et al. [20] to ensure efficient implementation for sequential consistency can also be used for operations that span multiple objects. Specifically, under these execution constraints, it is necessary and sufficient to ensure legality of reads ....

....our model is a generalization of the traditional DSM model, determining whether a given execution is sequentially consistent in our model is NPcomplete too. Misra proved that checking whether an execution satisfies atomic consistency is solvable in polynomial time when reads from relation is known [18]. It turns out that this is not the case when the operations can encompass multiple objects. In this section we show that determining whether a given execution is linearizable is an NP complete problem when the operations are allowed to span multiple objects and even when reads from relation is ....

Jayadev Misra. "Axioms for memory access in asynchronous hardware systems". ACM Transactions on Programming Language and Systems, 8(1):142--153, January 1986.

....of M serial . This definition is our characterization of cache coherence as a pure behavioral specification, abstracted from any architectural assumptions. This is the condition usually used in designing cache algorithms, and has also been called dynamic atomicity [HA90] See also [Mis86] for a axiomatic specification. Definition 2 is the consistency definition advocated in this paper. It is less restrictive than definition 1, requiring that for each behavior of the cache memory system, there exist a behavior of the conventional shared memory so that for each processor ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, January 1986.

....variable x issued by process P i is denoted w i (x)v where v is the new value associated with x; similarly, r i (x)v denotes a read event on a variable x issued by P i and returning the value v from the variable x. Moreover, the set of events produced by P i is denoted h i . For simplicity, as in [8], we assume that all values written into a variable x are distinct and that each variable x has an initial value in x (written by an initial fictitious write operation) Each process P i runs asynchronously a local program, made of read and write operations, whose execution is modeled by a ....

.... H e t j nor e t j H e s i . The shared memory model can be refined by imposing additional constraints on computations. A set of such additional constraints actually define a consistency criterion. The fact that an overwritten value cannot be read again is expressed by the concept of legality [2, 8, 11] for read events. A read event r(x)v is legal in b H if 6 9e s i : w(x)v H e s i H r(x)v where e s i = r(x)u or e s i = w(x)u and u 6= v. A computation b H is legal if all its read events are legal. Two consistency criteria for shared memory are usually considered: ffl Sequential ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, 1986.

.... structures used in sequential programming [7] Schneider [9] uses a notion of phases (called full acknowledgment) to express message stability and Awerbuch exploits phases for synchronizers [1] Other examples are the use of phases as basic mechanisms for distributed discrete event simulation [6] (null message approach) Finally, phases are a suitable means for computing consistent global snapshots using markers [2] Recently, Torres Rojas and Ahamad presented an approach based on plausible clocks [11] It is aimed at trading quality of reasoning among two events against timestamp size. ....

J. Misra. Axioms for Memory Access in Asynchronous Hardware Systems. ACM Trans. on Programming Languages and Systems, 8(1):142--153, 1986.

....value were written to the same memory location more than once. As a consequence, the semantics associated with the mi Gamma relation is one of certainly influences as opposed to may influence. This assumption has been used in order to simplify some formal definitions of consistency models [18, 15, 17, 14]. In Section 6, this assumption is relaxed and a second definition for legality is introduced. The first step towards defining legality over an execution is to extend the execution s partial order through the addition of pairs of operations aimed at reflecting the need for a legal linear ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Trans. on Programming Languages and Systems, 8(1): 142--153, January 1986.

....correct values (i.e. satisfy the consistency criterion) Serializability and two phase locking, mainly studied and used in the database field, are the best known examples of a consistency criterion and its associated implementation protocol. Traditional consistency criteria (namely atomicity [13], serializability [3] and linearizability [8] require that all processes have the same sequential view of the computation. This view is formally defined as a total order on operations issued by processes and an execution is correct if any read of an object gets the last value previously written ....

J. Misra. Axioms for Memory Access in Asynchronous Hardware Systems. ACM Trans. on Programming Languages and Systems, 8(1):142--153, 1986.

....leading to confusion and contradictory claims. In Section 2, we discuss a possible basis of such confusions. In this paper, we present a precise characterization of processor consistency by developing non operational definitions. We do so by using a formal method similar to those used by Misra [24] and by Herlihy and Wing for defining strongly consistent memories. This method allows us to explicitly demonstrate how the two definitions of processor consistency relate to each other and to other types of shared memory. We show that the two definitions are incomparable: each permits executions ....

....that given by Goodman s definition. In Section 5, we precisely characterize the differences between the two definitions. 3 Definitions, Terminology, and Notation This section formally describes the system that underlies our definitions and results. We use a model derived from those used by Misra [24] and by Herlihy and Wing [16] In Sections 4 and 5, we use this model to define various forms of shared memory, including two formulations of processor consistency. We define a system to be a finite set of processors that interact via a shared memory that consists of a finite set of locations. A ....

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Jayadev Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, January 1986. The Power of Processor Consistency 21

....describes the effect of each operation on an object of this type when executed alone. As in a concurrent system an object can be accessed concurrently by several processes, it is necessary to define consistency conditions for concurrent objects. Sequential consistency [5] and register atomicity [6] are two such consistency conditions. Serializability is a consistency condition well known in transactional systems [1] In [3] Herlihy and Wing have introduced a consistency condition called Linearizability. This consistency condition generalizes the classical Atomicity consistency condition ....

....provides the illusion that each operation applied by concurrent processes takes effect instantaneously at some point between its invocation and its response. When restricted to objects providing only read and write operations (register objects) it is equivalent to atomicity as defined by Misra in [6]. So, Linearizability generalizes Misra s approach to objects with a richer set of operations. The two important requirements of Linearizability are: 1) each operation should appear to take effect instantaneously, and (2) the order of non concurrent operations should be preserved. More formally ....

J. Misra. Axioms for Memory Access in Asynchronous Hardware Systems. ACM Trans. on Prog. Lang. and Systems, 8(1):142-153, 1986. Irisa

....unique across all processes. Also, the timeline for the execution sequence at all processes start at T Start , though the operations may not immediately commence at that time. All the objects values are initialized to zero at the start by an initial ctitious write operation. For simplicity, as in [16, 17], we assume all values written into an object x are distinct 1 . Moreover, the parameters of an operation are omitted when they are not important. 3.2 Semantics of Operations A timed write (tw) into an object de nes a new value for the object and also ensures that this value is perceived at ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 1(8):142-153, Jan 1986.

....(i.e. satisfy the consistency criterion) Serializability and the two phase locking protocol, mainly studied and used in the database field, are the best known examples of a consistency criterion and its associated implementation protocol. Traditional consistency criteria (namely, atomicity [19], serializability [6] and linearizability [11] require that all processes have the same sequential view of the computation. This view is formally defined as a total order on operations issued by processes and an execution is correct if any read of an object gets the last value previously written ....

J. Misra. Axioms for Memory Access in Asynchronous Hardware Systems. ACM Trans. on Programming Languages and Systems, 8(1):142--153, 1986.

....do not include the architectural restrictions described above. Including them 3 would be straightforward, though tedious the interested reader is referred to [17] Alternative approaches to specifying concurrent objects are via their serial specification [18] or as a set of axioms (cf. [21, 25]) Axiomatic specifications for snapshot memories appear in [3, 4, 10] 2.1 Specification of Single Writer Snapshot Memories Following [24, 17] a single writer atomic snapshot memory for n processes and a particular data set Data is an automaton with two types of input Request actions: ....

Misra, J. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8, 1 (Jan. 1986) 142--153.

....a read allows to obtain a value of the object. A write of value v into object x by process P i is denoted w i (x)v; similarly a read of x by process P j is denoted r j (x)v where v is the value returned by the read operation; op will denote either r (read) or w (write) For simplicity, as in [26, 4, 32], we assume all values written 1 Moreover, it is worth noting that this set of formal definitions is based on very few (and simple) mathematical notions, namely: partial order, linear extension, suborder and legality (of read operations) Irisa Consistency Criteria for Shared Memories 5 into ....

....between sequential consistency and atomic consistency lies in the meaning of the word last . In the case of sequential consistency last refers to logical time, while it refers to physical time in the case of atomic consistency (point ii of the definition) The interested reader will find in [26, 7] a theory of atomic consistency. In [18] under the name of linearizability, atomic consistency theory is generalized to objects. Irisa Consistency Criteria for Shared Memories 9 4.2 Protocols The most representative protocol implementing atomic consistency on top of distributed memory parallel ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, 1986.

....a large selection of memory consistency models. Most closely related to our research are several papers presenting formal descriptions of specific memory models [22, 2, 1, 4, 5, 8, 14, 13, 16, 20, 27, 30] and papers that present various formalisms for describing memories and reasoning about them [3, 6, 7, 4, 11, 15, 25, 26, 17, 29, 33]. Our work has benefited from all of these papers. For an extensive bibliography on memory consistency models see the online listing at the University of Alberta (http: www.cs.ualberta.ca rasit dsmbiblio node2.html) Section 2 reviews a framework for defining memory consistency models, and then ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Trans. on Programming Languages and Systems, 8(1):142--153, 1986.

....do not include the architectural restrictions described above. Including them would be straightforward, though tedious the interested reader is referred to [17] Alternative approaches to specifying concurrent objects are via their serial specification [18] or as a set of axioms (cf. [21, 25]) Axiomatic specifications for snapshot memories appear in [3, 4, 10] 2.1 Specification of Single Writer Snapshot Memories Following [24, 17] a single writer atomic snapshot memory for n processes and a particular data set Data is an automaton with two types of input Request actions: ....

Misra, J. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8, 1 (Jan. 1986) 142--153.

....through a generous donation by Sun Microsystems. This paper appears as University of Texas at Austin, Department of Computer Sciences, Technical Report TR 99 11. We introduce synchronizability , a new correctness criteria that is weaker than the more traditional notion of serializability [3], and we prove that our nonblocking deque implementation is synchronizable. Whereas serializability requires that concurrent method invocations appear as if they are executed atomically in some serial order, synchronizability allows some invocations to appear as if they are executed atomically at ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages

....when a read operation is executed by a processor. A more general framework described by Ahamad et al. 5] is used here, as it allows us to define and easily relate causal memory to a range of memory models that have been proposed. 3. 1 The Model The model is motivated by the ones used by Misra [45] and by Herlihy and Wing [29] A system is defined to be a finite set of processors that interact via a shared memory consisting of a finite set of locations. Processors execute read and write operations. Each such operation acts on a named location and has an associated value. For example, a ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1), January 1986.

....difficulties one encounters with persistent communication are related to the low level semantics of reading and writing in the context of concurrency and limited availability of atomic operations. The objects manipulated by read and write operations are called registers, which are also studied in [13]. Registers can be classified by a number of parameters, including the types of operations they admit, the number of concurrent readers and writers that are possible, the size of the register, and how they behave under concurrent access. For instance, a register is called safe if it satisfies the ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 6:142--153, 1986.

....correct values (i.e. satisfy the consistency criterion) Serializability and two phase locking, mainly studied and used in the database field, are the best known examples of a consistency criterion and its associated implementation protocol. Traditional consistency criteria (namely atomicity [8], serializability [3] and linearizability [6] require that all processes have the same sequential view of the computation. This view is formally defined as a total order on operations issued by processes. An execution is The author is supported by the Basic Research Action Program of the ....

J. Misra. Axioms for Memory Access in Asynchronous Hardware Systems. ACM TOPLAS, 8(1):142--153, 1986.

....Also, because such an object can be accessed concurrently by any number of the processes that share it, wait free implementations allow processes to execute with maximum parallelism. The notion of an atomic register is of fundamental importance in the study of wait free shared data objects [24, 25, 28, 30]. An atomic register is a shared data object that can either be read or written (but not both) in a single operation. An atomic register can be characterized by the number of processes that can read or write it, and the number of bits that it stores. The simplest atomic register can be read by one ....

J. Misra, "Axioms for Memory Access in Asynchronous Hardware Systems," ACM Transactions on Programming Languages and Systems, Vol. 8, No. 1, January 1986, pp. 142-153.

....a read allows to obtain a value of the object. A write of value v into object x by process P i is denoted w i (x)v; similarly a read of x by process P j is denoted r j (x)v where v is the value returned by the read operation; op will denote either r (read) or w (write) For simplicity, as in [13, 3, 19], we assume all values written into an object x are distinct. Moreover, the parameters of an operation are omitted when they are not important. Each object has an initial value; it is assumed that this value has been assigned by an initial fictitious write operation. 1 Moreover, it is worth ....

....between sequential consistency and atomic consistency lies in the meaning of the word last . In the case of sequential consistency last refers to logical time, while it refers to physical time in the case of atomic consistency (point ii of the definition) The interested reader will find in [13, 5] a theory of atomic consistency. In [7] under the name of linearizability, atomic consistency theory is generalized to objects. 4.2 Protocols The most representative protocol implementing atomic consistency on top of distributed memory parallel machines is the Li Hudak s one [10] This ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, 1986.

....also permit maximum parallelism: such a data object can be accessed concurrently by any number of the processes that share it since one access does not have to wait for another to complete. The notion of an atomic register is of fundamental importance in the study of wait free shared data objects [18, 19, 22, 24]. An atomic register is a shared data object that can either be read or written (but not both) in a single operation. An atomic register can be characterized by the number of processes that can read or write it, and the number of bits that it stores. The simplest atomic register can be read by one ....

J. Misra, "Axioms for Memory Access in Asynchronous Hardware Systems," ACM Transactions on Programming Languages and Systems, Vol. 8, No. 1, January 1986, pp. 142-153.

....by characterizing the possible values that could be returned when a read operation is executed by a processor. We use a more general framework here, as it allows us to easily relate causal memory to a range of memory models that have been proposed. The model is motivated by the ones used by Misra [36] and by Herlihy and Wing [23] We define the system to be a finite set of processors that interact via a shared memory consisting of a finite set of locations. Processors execute read and write operations. Each such operation acts on a named location and has an associated value. For example, a ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, January 1986.

....of them in the following sections. In [Mos93] Mosberger discusses memory consistency models and their influence on software in the context of parallel machines and focuses on the influence that weakened consistency models have on language, compiler and runtime system design. Some researchers [Mis86, ABJ 93, MRZ95] are interested in formalizing memory consistency models in order to compare the various models and to devise efficient implementations. Sequential Consistency (SC) Contrary to strict consistency which allows only one sequence of memory accesses, and therefore does not allow ....

Jayadev Misra. Axioms for memory access in asynchronous hardware systems. ACM Transaction on Programming Languages and Systems, 8(1):142--153, 1986. Memory Model.

....problem [23] We show that the problem of checking whether a given history is m linearizable is also NP complete. This is true even when the reads from relation (defined later) is known. Note that when the reads from relation is known, the linearizability can be checked in polynomial time [19]. We show that execution constraints proposed by Mizuno et al. [20] to ensure efficient implementation for sequential consistency can also be used for operations that span multiple objects. Specifically, under these execution constraints, it is necessary and sufficient to ensure legality of reads ....

....Since our model is a generalization of the traditional DSM model, determining whether a given execution is m sequentially consistent is NP complete too. Misra proved that checking whether an execution satisfies atomic consistency is solvable in polynomial time when reads from relation is known [19]. It turns out that this is not the case when the operations can encompass multiple objects. In this section we show that determining whether a given execution is m linearizable is an NP complete problem even when reads from relation is known. We will use the results in databases to prove the ....

Jayadev Misra. "Axioms for memory access in asynchronous hardware systems". ACM Transactions on Programming Language and Systems, 8(1):142--153, January 1986.

....system an object can be accessed supported in part by the NSF Grants ECS 9414780, CCR 9520540, and a General Motors Fellowship. concurrently by several processes, it is necessary to define consistency conditions for concurrent objects. Sequential consistency [5] and register atomicity [6] are two such consistency conditions. Serializability is a consistency condition well known in transactional systems [1] In [3] Herlihy and Wing have introduced a consistency condition called Linearizability. This consistency condition generalizes the classical Atomicity consistency condition ....

....the illusion that each operation applied by concurrent processes takes effect instantaneously at some point between its invocation and its response. When restricted to objects providing only read and write operations (register objects) it is equivalent to atomicity as defined by Misra in [6]. So, Linearizability generalizes Misra s approach to objects with a richer set of operations. The two important requirements of Linearizability are: 1) each operation should appear to take effect instantaneously, and (2) the order of non concurrent operations should be preserved. More formally ....

J. Misra. Axioms for Memory Access in Asynchronous Hardware Systems. ACM Trans. on Prog. Lang. and Systems, 8(1):142-153, 1986.

....related work in Section 6. In particular, we compare our model to the axiomatic model used in defining TSO [17] Finally we conclude the paper in Section 7. 2 The Model This section describes the model that underlies our definitions and results. Our model is motivated by the ones used by Misra [16] and Herlihy and Wing [10] We define the system to be a finite set of processors that interact via a shared memory consisting of a finite set of locations. Processors execute read and write operations. Each such operation acts on a named location and has an associated value. For example, a write ....

....Comparison with Related Work In this paper, we have focused on developing a uniform framework that can be used to define a variety of memories. We do not define new memories and thus our goal differs from many of the papers that introduce new memories. Other papers that have had similar goals are [16] and [17] In [16] only atomic memory is considered, and this is stronger than sequential consistency. In [17] the TSO memory model is introduced using an axiom based specification which can be used to capture several memories. The axiom based model is also formal and precise and can be used to ....

[Article contains additional citation context not shown here]

Jayadev Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, January 1986.

....semantics offered to users from its particular implementations. Several authors have correctly claimed that a memory consistency criterion is a contract between the memory system and application programs [11] Three main consistency criteria have been proposed in the literature: atomic consistency [9] (also called linearizability [7] sequential consistency [8] and causal consistency [3] In all three cases a read operation returns the last value assigned to the variable (or written into the object) The three consistency criteria differ however in the definition of the last write operation. ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Trans. on Prog. Lang. and Systems, 8(1):142--153, 1986.

....happy medium: it allows non blocking implementations and is a useful model for a class of practical programs. 2 Shared Memory Systems This section formally describes the system that underlies our definitions and results. We use a model derived from those used by Herlihy and Wing [20] and by Misra [33]. We define a system to be a finite set of processes that interact via a shared memory that consists of a finite set of locations. Let P = fp 1 ; p 2 ; p n g be the set of processes. A process s interaction with the memory is through a series of read and write operations on the memory. ....

Jayadev Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, January 1986.

....semantics offered to users from its particular implementations. Several authors have correctly claimed that a memory consistency criterion is a contract between the memory system and application programs [21] Three main consistency criteria have been proposed in the literature: atomic consistency [19] (also called linearizability [14] sequential consistency [17] and causal consistency [3] In all three cases a read operation returns the last value assigned to the variable (or written into the object) The three consistency criteria differ however in the definition of the last write ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Trans. on Prog. Lang. and Systems, 8(1):142--153, 1986.

....assertions. Our notion of serializability is equivalent to the definition of linearizability given by Herlihy and Wing in [15] for the special case of implementing a program in which shared variables are accessed only by assignment statements. A similar notion has also been proposed by Misra [24]. In particular, Misra gives a set of axioms for constructing concurrent hardware registers, and shows that if a register satisfies these axioms, then concurrent accesses to the register can be viewed as being interleaved. To establish the sufficiency of our atomicity constraints, we considered in ....

J. Misra, "Axioms for Memory Access in Asynchronous Hardware Systems," ACM Transactions on Programming Languages and Systems, Vol. 8, No. 1, January 1986, pp. 142-153.

....Finally, the real time ordering of any non overlapping operations must be maintained in the illusory sequential execution. This notion of consistency is referred to as atomic consistency [4] and is formally defined by Herlihy and Wing as linearizability [6] This notion was also analyzed in [1, 10]. Implementations of linearizable distributed shared memory systems are expensive. Three known protocols for linearizability that have actually been implemented are presented in [2, 9] All three protocols assume that processors are connected by a network and that each processor has a local ....

Misra, J. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, 1986.

....in Section 7. 2 Related Work Atomicity of shared variables is the most stringent requirement on the behavior of shared variables in a concurrent system. It requires that even in the presence of concurrent access, the shared variables should behave as if each concurrent access occurred atomically [20, 25]. This idea was later generalized to arbitrary shared objects and termed linearizability by Herlihy and Wing [16] Sequential consistency [19] weakens the requirement of atomicity by not enforcing that the ordering of non overlapping operations be maintained in the equivalent global history. ....

....read operation r(x) reads from a write operation w(x) denoted w(x) r(x) if the value returned from the read operation r(x) is written by the write operation w(x) For simplicity, we assume that all write operations are associated with distinct values. This assumption is also made by Misra [25] and Ahamad et al. 3] The definition of the synchronization order 7 appears in the next subsection. 3.1 Synchronization Operations The effect of a synchronization operation type s on a history is captured by its synchronization order 7 s . We use o 1 7 s o 2 to denote that an operation o ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, January 1986.

....an ordering on the reads and writes, consistent with the memory model chosen. Ideally a distributed shared memory should provide all the consistency guarantees of a true shared memory. Lamport [23] defined a memory model called sequential consistency which provided such properties. Atomic memory [27] is a stronger memory model which requires that the memory maintain the real time order in which the reads and writes occur. Kai Li s Ivy system [24] is based on a writer invalidate readers protocol which implements atomic memory. Such implementations maintain the real time order by restricting a ....

....location can return. We use a more generalized framework here, since this can be used to classify a range of different memory models [21] 2.1 Formal Definition This section formally describes the system that underlies our implementation. We use a model that is similar to those used by Misra [27] and by Herlihy and Wing [19] We define a system to be a finite set of processors that interact via a shared memory that consists of a finite set of locations. A processor s interaction with the memory is through a series of read and write operations on the memory. Each such operation acts on ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, January 1986.

....they do not require that an update to object x at one node must become visible at nodes that have copies of x in a certain amount of time. In interactive applications, timely dissemination of an update is required. Such timeliness is provided by strong consistency models such as atomic memory [30] and linearizability [18] These consistency models require that serializations of operations respect the time at which the operations are executed. Clearly, protocols that implement such strong consistency are more expensive and do not permit any lag that may be acceptable in disseminating the ....

J. Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, January 1986.

....atomic register can be constructed in a wait free manner using single writer, single reader atomic registers. Our construction requires O(M 2 MN ) shared single writer, single reader safe bits, which is asymptotically optimal. Our definition of atomicity is equivalent to that given by Misra in [14]. His axioms for atomicity in essence require that all read and write operations be shrunk to a point; such a shrinking of operations is possible iff a function OE that meets the three conditions of our definition exists. Recently, Herlihy and Wing [8] have extended the idea of atomicity to ....

J. Misra, Axioms for memory access in asynchronous hardware systems, ACM Transactions on Programming Languages and Systems, Vol. 8, 1986, pp. 142-153.

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Misra J., Axioms for Memory Access in Asynchronous Hardware Systems. ACM Transactions on Programming Languages and Systems, 8(1):142-153, 1986.

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Jayadev Misra. Axioms for memory access in asynchronous hardware systems. ACM Transactions on Programming Languages and Systems, 8(1):142--153, January 1986.

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J. Misra, Axioms for memory access in asynchronous hardware systems, ACM Transactions on Programming Languages and Systems, Vol.8,1, 1986, pp.142-153.

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