| Spertus, Ellen and William J. Dally. Experiences Implementing Dataflow on a General- Purpose Parallel Computer. Proceedings of the 1991 International Conference on Par- allel Processing, pages II-231-II-235. |
.... partial ordering, inside a strongly connected block (although current implementation suggests that the instructions are executed sequentially inside a strongly connected block in the EM 4) Also related to autoscheduling are the works done by Culler et al. 63] at Berkeley and Spertus and Dally [64] at MIT. Both works can be essentially classified as software implementation of data flow models of computation. Spertus and Dally have developed the J Machine, which offers a special structure, called cfuture, for very fast synchronization. Culler et al. have defined a threaded abstract machine ....
E. Spertus and W. J. Dally, "Experiences implementing dataflow on a general-purpose parallel computer," in Proceedings of the 1991 International Conference on Parallel Processing, pp. II--231--235, August 12-16, 1991.
....the explicit token store architecture (ETS) used in the Monsoon machine [25, 26] in which multithreading with very efficient fork and join operations is used to implement a data flow model of execution. Discussion of other approaches to software implementation of data flow models can be found in [38] for the J Machine and in [9] for a machine built with commercial microprocessors. The P RISC architecture [24] uses special processor instructions, multithreading, and a token queue to exploit fine grain parallelism, with data flow capability. The T architecture [23] represents the step ....
Ellen Spertus and William J. Dally. Experiences Implementing Dataflow on a General-Purpose Parallel Computer. In Proceedings of the 1991 International Conference on Parallel Processing, August 12-16, 1991., pages II--231--235, 1991.
....have successfully completed and any return values have been sent to the caller, the frame can be freed. These structures are shown in Figure 1 4. MDP support for Iannucci s hybrid architecture is described in [21] A quantitative com parison of the three systems described here appears in [23, 22]. 1.3 Overview The next chapter provides a high level description of the TAM programming model and two MDP implementations of TAM. Chapter 3 describes the implementations in greater detail. Chapter 4 describes the compilation process. Analysis appears in Chapter 5, and conclusions and areas for ....
Spertus, Ellen and William J. Dally. Experiences Implementing Dataflow on a General- Purpose Parallel Computer. Proceedings of the 1991 International Conference on Par- allel Processing, pages II-231-II-235.
....codeblock have successfully completed and any return values have been sent to the caller, the frame can be freed. These structures are shown in Figure 1 4. MDP support for Iannucci s hybrid architecture is described in [21] A quantitative comparison of the three systems described here appears in [23, 22]. 1.3 Overview The next chapter provides a high level description of the TAM programming model and two MDP implementations of TAM. Chapter 3 describes the implementations in greater detail. 11 Chapter 4 describes the compilation process. Analysis appears in Chapter 5, and conclusions and areas ....
Spertus, Ellen and William J. Dally. Experiences Implementing Dataflow on a GeneralPurpose Parallel Computer. Proceedings of the 1991 International Conference on Parallel Processing, pages II-231--II-235.
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