D. Abramson. Hardware management of a large virtual memory. In Proceedings of the 4th Australian Computer Science Conference, pages 1-13, Brisbane, 1981.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....level store. The single level store was further developed by IBM [13, 7, 9] in the System 38 to support relational databases. More recently a number of research projects in Australia have focused on hardware support for persistence with a view to constructing more reliable operating systems, [1, 10, 11]. These and other similar systems [12] have relied upon memory management technology to map areas of the disk into volatile semiconductor store. In the past, main memory was at least two orders of magnitude more expensive than contemporary disk storage, much too large a gap to be crossed, despite ....

D. Abramson. Hardware management of a large virtual memory. In Proceedings of the 4th Australian Computer Science Conference, pages 1-13, Brisbane, 1981.

....In addition to the space constraints, there are speed considerations. some 6 or 7 levels of indirection would be involved in converting a logical to a physical address. To avoid these problems the notion of the inverted page table was developed independently for the SYSTEM 38 and for MONADS [11] [12] The technology was later adopted on the IBM 801 experimental RISC processor [13] and the RS 6000 series [14] An inverted page table contains records for each physical page of RAM indexed on the virtual pages that they contain. An indication of how it works is provided in figure 3. Hash ....

D. Abramson, "Hardware management of a large virtual memory," in Proceedings of the 4th Australian Computer Science Conference, (Brisbane), pp. 1--13, 1981.

....on each memory access. This is difficult since the SPARC only emits a 32 bit address. Two solution were considered. The first involves using the top 5 bits of the address to identify the capability register and the remaining 27 bits as the offset. A similar scheme has been used on other machines [8, 48]. This scheme has several disadvantages. First, it reduces the offset size to 27 bits and thus the maximum size of a segment to 2 27 bytes. Second, it is most convenient if the offset is in the low order bits of the address and this means that the register number is in the high order bits. As a ....

Abramson, D. A. "Hardware Management of a Large Virtual Memory", Proc. 4th Australian Computer Science Conference, Brisbane, pp. 1-13, 1981.

....of hashing schemes with real life data. 1622 1 Introduction Hashing is a widely used technique of organizing tables which also finds several applications in hardware. For example, hash tables are used to implement page tables in many modern architectures [1] such as IBM system 38 [2] Monads II[3], etc. Thakkar and Knowles proposed a method of address translation, using parallel hashing hardware [4] Although hashing is widely used in hardware, there is not much literature in this regard and specially we have not been able to find any paper dealing with the performance of hashing functions ....

D. Abramson, "Hardware management of a large virtual memory," Proc. 4th Australian Computer Science Conf., vol. 3, no. 1, 1981.

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D. Abramson. Hardware Management of a Large Virtual Memory. In Proc. of the 4th Australian Computer Science Conference, 1981.

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