S.K. Hong, and P. E. Allen, "Performance Driven Analog Layout Compiler," Proc. International Symposium on Circuits and Systems, May 1990, pp. 835-838. [Difficult paper. Results do not look impressive, and no verification, even with spice, of results.] Home/Search Document Not in Database Summary Related Articles Check |
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Automation of IC Layout with Analog Constraints - Malavasi, Charbon, Felt.. (1999) (2 citations) (Correct)
....designers need to trust a tool to meet their specs before using it. Analog CAD tools, like their digital counterparts, must guarantee to meet al..l specs, or otherwise to detect as soon as possible infeasibility and its causes. Only recently constraint driven layout generation tools [24] 25] [26], 27] have been proposed, generally based on sensitivity analysis of circuit performance [28] 29] In this paper, a methodology and the supporting tools [30] for performance driven layout synthesis are presented. In the methodology, high level constraints are automatically translated into a set ....
S. K. Hong and P. E. Allen, "Performance driven analog layout compiler", in Proc. IEEE Int. Symposium on Circuits and Systems, pp. 835--838, 1990.
MIDAS - a functional simulator for mixed digital and analog.. - Williams, Wooley (1995) (1 citation) (Correct)
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S.K. Hong, and P. E. Allen, "Performance Driven Analog Layout Compiler," Proc. International Symposium on Circuits and Systems, May 1990, pp. 835-838. [Difficult paper. Results do not look impressive, and no verification, even with spice, of results.]
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