S. Basumalick and K. D. Nilsen. Incorporating Caches in Real-Time Systems. In Proceedings of the Workshop on Architectures for Real-Time Applications, April 1994. Home/Search Document Not in Database Summary Related Articles |
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An Accurate Worst Case Timing Analysis Technique for RISC.. - Sung-Soo Lim (1994) (25 citations) (Correct)
....between the time it was preempted and the time it resumed execution. The additional delay due to this cache reload in the worst case is bounded by the time needed to completely fill the cache or by the time to reload all of its instruction and data memory blocks into the cache, whichever shorter [3]. It is possible to obtain a tighter bound on this additional delay by taking into account the usefulness of cache blocks. A cache block is useful at an execution point if the cache block is accessed at least once after the point before 6 In a set associative cache, the index of the mapped set ....
S. Basumalick and K. D. Nilsen. Incorporating Caches in Real-Time Systems. In Proceedings of the Workshop on Architectures for Real-Time Applications, April 1994.
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