Z. Cventanovic and D. Bhandarkar. Performance characterization of the Alpha 21164 microprocessor using TP and SPECworkloads. In Proceedings of the 21st Annual International Symposium on Computer Architecture, pages 60--70, Apr 1994.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....servers. While applications such as decision support (DSS) and Web index search have been shown to be relatively insensitive to memory system performance [2] a number of recent studies have underscored the radically different behavior of online transaction processing (OLTP) workloads [2, 6, 7, 15, 17, 19, 25]. In general, OLTP workloads lead to inefficient executions with a large memory stall component and present a more challenging set of requirements for processor and memory system design. This behavior arises from large instruction and data footprints and high communication miss rates that are ....

Z. Cventanovic and D. Bhandarkar. Performance characterization of the Alpha 21164 microprocessor using TP and SPECworkloads. In Proceedings of the 21st Annual International Symposium on Computer Architecture, pages 60--70, Apr 1994.

....these workloads. While applications such as decision support (DSS) and Web index search have been shown to be relatively insensitive to memory system performance [1] a number of recent studies have underscored the radically different behavior of online transaction processing (OLTP) workloads [1, 2, 3, 8, 12, 15, 18]. In general, OLTP workloads lead to inefficient executions with a large memory stall component and present a more challenging set of requirements for processor and memory system design. This behavior arises from large instruction and data footprints and high communication miss rates that are ....

....trade offs that arise in the integration of various systemlevel modules onto the processor chip, and quantifying the performance gains from such integration in the context of OLTP workloads. There have been a large number of recent studies of OLTP due to the increasing importance of this workload [1, 2, 3, 5, 8, 11, 12, 15, 16, 18]. Many of these studies emphasize the importance of memory system behavior on OLTP performance. Barroso et al. 1] provide performance results for various off chip L2 cache sizes, and recommend the use of large (8MB) direct mapped offchip caches. This recommendation is consistent with our obser ....

Z. Cventanovic and D. Bhandarkar. Performance characterization of the Alpha 21164 microprocessor using TP and SPECworkloads. In Proceedings of the 21st Annual International Symposium on Computer Architecture, pages 60--70, Apr 1994.

.... along with academic research in this area, have been heavily influenced by popular scientific and engineering benchmarks such as SPLASH 2 [26] and STREAMS [13] with only a handful of published architectural studies that have in some way tried to address issues specific to commercial workloads [3, 7, 9, 12, 14, 16, 20, 21, 24]. The lack of architectural research on commercial applications is partly due to the fact that I O issues have been historically considered as the primary performance bottleneck for such workloads. However, innovations in disk subsystems (RAID arrays, use of non volatile memory) and software ....

....variety of monitoring and profiling tools that are available on the Alpha platform. To begin with, the Alpha 21164 processor provides a rich set of event counters that can be used to construct a detailed view of processor behavior, including all activity within the three level cache hierarchy [3]. We used the IPROBE monitoring tool to gain access to the processor event counters. A typical monitoring experiment involved multiple runs of the workload with IPROBE, measuring a single event in each run. 1 Event types available include counts of accesses and misses in the various caches, TLB ....

Z. Cventanovic and D. Bhandarkar. Performance characterization of the Alpha 21164 microprocessor using TP and SPECworkloads. In Proceedings of the 21st Annual International Symposium on Computer Architecture, pages 60--70, Apr 1994.

....workloads to become the largest market segment for multiprocessor servers. While the behavior of DSS workloads has been shown to be somewhat reminiscent of scientific engineering applications [2, 28] a number of recent studies have underscored the radically different behavior of OLTP workloads [2, 4, 5, 11, 14, 20, 21]. In general, OLTP workloads lead to inefficient executions with a large memory stall component and present a more challenging set of requirements for processor and memory system design. This behavior arises from large instruction and data footprints and high communication miss rates that are ....

....the first to study the performance of memory consistency models in the context of database workloads. There are a number of studies based on the performance of outof order processors for non database workloads(e.g. 8, 16, 18] Most previous studies of databases are based on in order processors [2, 4, 5, 6, 14, 20, 27, 28], and therefore do not address the benefits of more aggressive processor architectures. A number of the studies are limited to uniprocessor systems [4, 6, 13, 14] As discussed in Section 3, data communication misses play a more 3 The increase in the local and remote components of read latency ....

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Z. Cventanovic and D. Bhandarkar. Performance characterization of the Alpha 21164 microprocessor using TP and SPECworkloads. In Proceedings of the 21st Annual International Symposium on Computer Architecture, pages 60--70, Apr 1994.

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