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.... of Amsterdam Programming Research Group a b A Formal Axiomatization for Alphabet Reasoning with Parametrized Processes Henri Korver Alex Sellink Report P9703 Februari 1997 University of Amsterdam Department of Computer Science Programming Research Group A formal axiomatization for alphabet reasoning with parametrized processes Henri Korver Alex Sellink Report P9703 Februari 1997 H.P. Korver ID Research Groningenweg 6 2803 PV Gouda The ....

.... Alphabet Reasoning with Parametrized Processes Henri Korver Alex Sellink Report P9703 Februari 1997 University of Amsterdam Department of Computer Science Programming Research Group A formal axiomatization for alphabet reasoning with parametrized processes Henri Korver Alex Sellink Report P9703 Februari 1997 H.P. Korver ID Research Groningenweg 6 2803 PV Gouda The Netherlands tel. 31 182 546546 e mail: H.Korver idr.nl M.P.A. Sellink Programming Research Group Department of Computer Science University of Amsterdam Kruislaan 403 NL 1098 SJ Amsterdam The Netherlands tel. ....

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J.A. Bergstra and A. Ponse. Frame-based process logics.

....chaining for all variables (dotted arrows) The characters t and f denote the path that is taken when the condition of the while is respectively true or false. program fac begin declare input: natural, output: natural, repnr: natural, rep: natural; input : 3; output : 1; while (input 1 0) do rep : output; repnr : input; while (repnr 1 0) do output : output rep; repnr : repnr 1 od; input : input 1 od end program fac input : 3 output : 1 while (input 1 0) do t rep : output repnr : input while (repnr 1 0) do t output : output rep repnr : ....

.... t and f denote the path that is taken when the condition of the while is respectively true or false. program fac begin declare input: natural, output: natural, repnr: natural, rep: natural; input : 3; output : 1; while (input 1 0) do rep : output; repnr : input; while (repnr 1 0) do output : output rep; repnr : repnr 1 od; input : input 1 od end program fac input : 3 output : 1 while (input 1 0) do t rep : output repnr : input while (repnr 1 0) do t output : output rep repnr : repnr 1 input : input 1 end f f 4 A Generic ....

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J.A. Bergstra and A. Ponse. Frame-based process logics.

....of Amsterdam Programming Research Group DATA DIVISION. WORKING STORAGE SECTION. 01. DSJDFRR IJ192390 SDJGEHJ2. 02. UI8T G5KM N034D PIC 99 99 99. 02. HJML97G KNBVFD45 7 HG PIC XXXXXX. 02. LK21 34 JSJKDJR 93894J PIC : 01. DVK54 FJKFJK4390 23 OKR2349IO PIC 9999. 01. HDRISO0934834R3NMJRQRRUJJJ49 PIC 9(2) Reengineering COBOL software implies specification of the underlying dialects Mark van den Brand Alex Sellink Chris Verhoef Report P9702 Februari University of Amsterdam Department of Computer Science ....

....of Amsterdam Programming Research Group DATA DIVISION. WORKING STORAGE SECTION. 01. DSJDFRR IJ192390 SDJGEHJ2. 02. UI8T G5KM N034D PIC 99 99 99. 02. HJML97G KNBVFD45 7 HG PIC XXXXXX. 02. LK21 34 JSJKDJR 93894J PIC : 01. DVK54 FJKFJK4390 23 OKR2349IO PIC 9999. 01. HDRISO0934834R3NMJRQRRUJJJ49 PIC 9(2) Reengineering COBOL software implies specification of the underlying dialects Mark van den Brand Alex Sellink Chris Verhoef Report P9702 Februari University of Amsterdam Department of Computer Science Programming Research Group Reengineering COBOL ....

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J.A. Bergstra and A. Ponse. Frame-based process logics.

....Kruislaan 403 NL 1098 SJ Amsterdam The Netherlands tel. 31 20 525 7593 e mail: markvdb fwi.uva.nl P. Klint Programming Research Group Department of Computer Science University of Amsterdam Kruislaan 403 NL 1098 SJ Amsterdam The Netherlands tel. 31 20 525 7585 e mail: paulk fwi.uva.nl CWI P.O.Box 94079 1090 GB Amsterdam The Netherlands tel. 31 20 592 4126 e mail: paulk cwi.nl C. Verhoef Programming Research Group Department of Computer Science University of Amsterdam Kruislaan 403 NL 1098 SJ Amsterdam The Netherlands tel. 31 20 525 7581 e mail: x fwi.uva.nl Universiteit van Amsterdam, ....

.... van Amsterdam, Re engineering needs Generic Programming Language Technology Mark van den Brand 1 , Paul Klint 2;1 , Chris Verhoef 1 1 University of Amsterdam, Programming Research Group Kruislaan 403, NL 1098 SJ Amsterdam, The Netherlands 2 CWI, Department of Software Technology P.O. Box 94079, NL 1090 GB Amsterdam, The Netherlands markvdb wins.uva.nl, paulk cwi.nl, x wins.uva.nl Abstract Generic language technology and compiler construction techniques are a prerequisite to build analysis and conversion tools that are needed for the re engineering of large software systems. We ....

J.A. Bergstra and A. Ponse. Frame-based process logics.

.... of Amsterdam Programming Research Group Original Code Renovated Abstract Syntax Tree Transform Parse Unparse Code Generation of Components for Software Renovation Factories from Context free Grammars Mark van den Brand Alex Sellink Chris Verhoef Report P9705 June University of Amsterdam Department of Computer Science Programming Research Group Generation of components for software renovation factories from context free grammars Mark van den Brand Alex Sellink Chris Verhoef Report P9705 June M.G.J. van den Brand Programming Research Group ....

.... Grammars Mark van den Brand Alex Sellink Chris Verhoef Report P9705 June University of Amsterdam Department of Computer Science Programming Research Group Generation of components for software renovation factories from context free grammars Mark van den Brand Alex Sellink Chris Verhoef Report P9705 June M.G.J. van den Brand Programming Research Group Department of Computer Science University of Amsterdam Kruislaan 403 NL 1098 SJ Amsterdam The Netherlands tel. 31 20 525 7593 e mail: markvdb fwi.uva.nl M.P.A. Sellink Programming Research Group Department of Computer Science University of ....

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J.A. Bergstra and A. Ponse. Frame-based process logics.

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J.A. Bergstra and A. Ponse. Frame-based process logics.

....This logic combines a simple syntax with a high expressivity; it can distinguish frames that are not the same as sets of transitions and states. We show how Dicky logic and CTL can be embedded in TFL. 1 Introduction In recent years, a multitude of process algebras have evolved. Bergstra and Ponse [8, 9] proposed to study basic properties of such process algebras on the level of frames, which are labelled, directed graphs. Essentially, frames are transition systems without explicit start and termination nodes. Frames can be converted into processes by means of process extraction, which means ....

....s 0 FA6 s 0 Phi (s a Gamma s 0 ) s a Gamma s 0 TFA1 s Phi (s oe Gamma s 0 ) s oe Gamma s 0 TFA2 s 0 Phi (s oe Gamma s 0 ) s oe Gamma s 0 Table 1: Axioms for frames Remark 2. 1 A frame can be converted into a process using process extraction, from [9, 7], which means that a start state and a termination state in the frame are determined. The expression s q tF denotes the frame F with start state s and termination state t. See [7] for the precise definition of process extraction for timed frames. 2.2 Paths We assume a set Paths of paths p; q; ....

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J.A. Bergstra and A. Ponse. Frame-based process logic. In Workshop on Modal Logic and Process Algebra: a bisimulation perspective, Amsterdam, CSLI Lecture Notes 53, pages 39--63. CSLI, Stanford University, 1995.

....logic combines a simple syntax with a high expressivity; it can distinguish frames that are not the same as sets of transitions and states. We show how Dicky logic and CTL can be embedded into TFL. 1 Introduction In recent years, a multitude of process algebras have evolved. Bergstra and Ponse [9, 10] proposed to study basic properties of such process algebras on the level of frames, which are labelled, directed graphs. Essentially, frames are transition systems without explicit start and termination nodes. Frames can be converted into processes by means of process extraction, which means that ....

....a train can only traverse a level crossing if its barriers are closed. In order to capture such external conditions, Baeten and Bergstra [6, 3] extended the process algebra ACP with signals. They advocated a new approach towards signals in [4] and subsequently this approach was adapted to frames [10]. Following [7] this paper considers signal inserted timed frames. Many process algebras have been supplied with various kinds of modal and temporal logics, usually with the aim to distinguish processes up to some desirable equivalence. That is, two processes are equivalent if and only if they ....

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J.A. Bergstra and A. Ponse. Frame-based process logic. In Proceedings Workshop on Modal Logic and Process Algebra: a Bisimulation Perspective, Amsterdam, CSLI Lecture Notes 53, pages 39--63. CSLI, Stanford University, 1995.

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J.A. Bergstra and A. Ponse. Frame-based process logics.

....systems. There is a well developed tradition of modal formalisms for the description of transition systems (for an overview of these formalisms, see e.g. 16] Process algebra studies transition systems at a more abstract level: transition systems modulo an appropriate process equivalence . In [11], the connection between frames and processes is studied in the setting of ACP [5, 8] and moreover signal insertion is added. In this paper, we extend frame algebra to an algebra of timed frames. We study the connection between timed frames and discrete time processes in the setting of the ....

....4.1) Finally, we describe the extension of timed frames needed to cover, in addition to the relative time case, the absolute time case (Section 4.2) 2 Preliminaries This section contains a survey of time free frame algebra, including its extension with signal insertion. We refer to [10] and [11] for further details. A brief summary of the ingredients of process algebra used in later sections is given as well. We will suppose that the reader is familiar with them. Appropriate references to the literature are included. 2.1 Simple frames Frames are built from states and transitions between ....

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J.A. Bergstra and A. Ponse. Frame-based process logics. In A. Ponse, M. de Rijke, and Y. Venema, editors, Modal Logic and Process Algebra, pages 39--64. CSLI Lecture Notes 53, CSLI Publications, 1995.

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J.A. Bergstra and A. Ponse. Frame-based process logics.

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