D. Simpson. Real-time RISCS. Systems Integration, pages 35-38, July 1989. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Static Cache Simulation and its Applications - Mueller (1994) (10 citations) (Correct)
....via static cache simulation is a general method to quickly obtain accurate measurements. Chapter 7 Predicting Instruction Cache Behavior It has been claimed that the execution time of a program can often be predicted more accurately on an uncached system than on a system with cache memory [27, 60, 43]. Thus, caches are often disabled for critical real time tasks to ensure the predictability required for scheduling analysis. This work shows that instruction caching can be exploited to gain execution speed without sacrificing predictability. This work takes advantage of static cache simulation ....
....to be analyzed to predict both BET and WET. ffl Architectural features have to be taken into account (e.g. pipeline stalls) In the context of real time systems, caches have been regarded as a source of unpredictability, which conflicts with the goal of making the execution of tasks deterministic [60]. For a system with an instruction cache as a primary (on chip) cache, the execution time of an instruction can vary greatly depending on whether the given instruction is in cache or not. In addition, context switches and interrupts may replace the instructions cached by one task with instructions ....
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D. Simpson. Real-time RISCS. Systems Integration, pages 35--38, July 1989.
Predicting Instruction Cache Behavior - Mueller, Whalley, Harmon (1993) (18 citations) (Correct)
.... University Florida A M University Tallahassee, FL 32306 4019 Tallahassee, FL 32307 e mail: whalley cs.fsu.edu phone: 904) 644 3506 Abstract It has been claimed that the execution time of a program can often be predicted more accurately on an uncached system than on a system with cache memory [5, 20]. Thus, caches are often disabled for critical real time tasks to ensure the predictability required for scheduling analysis. This work shows that instruction caching can be exploited to gain execution speed without sacrificing predictability. A new method called Static Cache Simulation is ....
....major factor to bridge the bottleneck between the time to access main memory and the faster clock rate of current processors. In the context of real time systems, caches have been regarded as a source for unpredictability which conflicts with the goal of making the execution of tasks deterministic [20]. For a system with an instruction cache as a primary (on chip) cache, the execution time of an instruction can vary greatly depending on whether the given instruction is in cache or not. In addition, context switches and interrupts may replace the instructions cached by one task with instructions ....
[Article contains additional citation context not shown here]
D. Simpson. Real-time RISCS. Systems Integration, pages 35--38, July 1989.
Predicting Instruction Cache Behavior - Mueller, Whalley, Harmon (1993) (18 citations) (Correct)
.... University Florida A M University Tallahassee, FL 32306 4019 Tallahassee, FL 32307 e mail: whalley cs.fsu.edu phone: 904) 644 3506 Abstract It has been claimed that the execution time of a program can often be predicted more accurately on an uncached system than on a system with cache memory [5, 20]. Thus, caches are often disabled for critical real time tasks to ensure the predictability required for scheduling analysis. This work shows that instruction caching can be exploited to gain execution speed without sacrificing predictability. A new method called Static Cache Simulation is ....
....major factor to bridge the bottleneck between the time to access main memory and the faster clock rate of current processors. In the context of real time systems, caches have been regarded as a source for unpredictability which conflicts with the goal of making the execution of tasks deterministic [20]. For a system with an instruction cache as a primary (on chip) cache, the execution time of an instruction can vary greatly depending on whether the given instruction is in cache or not. In addition, context switches and interrupts may replace the instructions cached by one task with instructions ....
[Article contains additional citation context not shown here]
D. Simpson. Real-time RISCS. Systems Integration, pages 35--38, July 1989.
Efficient Analysis of Temporal Properties for Real-Time Systems - .. - Müller (2000) (Correct)
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D. Simpson. Real-time RISCS. Systems Integration, pages 35-38, July 1989.
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