Y. Kim, T.-D. Han, S.-D. Kim, and S.-B. Yang. An effective memory-processor integrated architecture for computer vision. In 1997 Int'l Conf. Parallel Processing, pp. 266--269. Home/Search Document Details and Download
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SIMD and Mixed-Mode Implementations of a Visual Tracking.. - Kulaczewski, Siegel (1998) (Correct)
....in [5] This paper is a summary of parts of [4] and presents the implementation on the SIMD MasPar MP 1 and the mixed mode PASM prototype. Examples of existing or recently proposed SIMD architectures specifically designed for image processing applications are CPP s Gamma [2] HiPAR [7] and MPA [3]. Image processing is also one of the target applications for the many prototyped mixed mode machines, e.g. PASM, Triton, Execube, and MeshSP [8] It is, therefore, of interest to investigate the architectural implications and trade offs experienced when porting an image processing application to ....
Y. Kim, T.-D. Han, S.-D. Kim, and S.-B. Yang. An effective memory-processor integrated architecture for computer vision. In 1997 Int'l Conf. Parallel Processing, pp. 266--269.
Impact of the Memory Interface Structure in the.. - Kim, Han, Kim (1999) Self-citation (Kim Han) (Correct)
....RAM (PPRAM) project [18, 17] and Stanford Univ. Hydra project [27, 28] were proposed in order to overcome the low bandwidth to the local memory. Also, memory processor integrated arrays, such as computational RAM (C RAM) 6] processing in memory(PIM) 8] and memory processor integrated array [12, 13, 14] which integrate the SIMD parallel processors and their local memories within a chip have been proposed. However, the impact of the memory interface structure has not been studied in the aforementioned memory processor integrated architectures. The memory based processor array (MPA) was ....
....within a chip have been proposed. However, the impact of the memory interface structure has not been studied in the aforementioned memory processor integrated architectures. The memory based processor array (MPA) was previously designed as an effective memory processor integrated architecture [12, 13, 14]. It is an effective SIMD array which is based on the memory processor integration structure. Thus, it can be easily attached into any host system from personal computers to multiprocessors by the memory interface structure. It can be considered as a portion of the single linear address space ....
Y. Kim, T.D. Han, S.D. Kim, and S.B. Yang, "An effective memory-processor integrated architecture for computer vision," 26th Int'l Conf. Parallel Processing, (Aug. 1997) 266 -- 269.
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