D. L. Springer and D. E. Thomas, "Exploiting the special structure of conflict and compatibility graphs in high-level synthesis," IEEE Tr ans. Comput.-Aided Des. Integr .Cir cuits Syst., vol. 13, no. 7, pp. 843--856, Jul. 1994. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Higher-Level Hardware Synthesis - Sharp (2002) (Correct)
....wiring overhead is becoming increasingly important as the feature size of transistors decreases; in modern circuits wiring is sometimes the dominant cost of a design. The compatibility graph (described above) can be extended to the minimum area binding problem by adding weights to cliques [134]. The weights correspond to the cost of assigning the verticies in the clique to a single resource (i.e. the cost of the resource itself plus the cost of the necessary interconnect and steering logic) The aim is now to find a covering set of cliques with minimal total weight. This is, of course, ....
SPRINGER, D., AND THOMAS, D. Exploiting the special structure of conflict and compatibility graphs in high-level synthesis. In Proceedings of the International Conference on Computer Aided Design (1990), pp. 254--257.
A Hierarchical Register Optimization Algorithm for.. - Katkoori, Roy, Vemuri (1996) (1 citation) (Correct)
....registers. Compatibility graphs can be used to represent life cycles that do not overlap; clique partitioning of the compatibility graph yields a set of registers. Both coloring and clique partitioning are NP complete. However, efficient heuristics have been discovered for solving both problems. [3, 4, 5, 6] Register optimization techniques can be broadly classified into two categories: value based and carrier based. In the value based approach, register optimization is modeled as the problem of mapping data values produced and used by operations in a data flow graph representation of the ....
D. L. Springer and D.E. Thomas, "Exploiting the Special Structure of Conflict and Compatibility Graphs in High-Level Synthesis ", Proc. ICCAD-1990, pp. 254-257, 1990.
On the Effectiveness of Theorem Proving Guided Discovery of .. - Narasimhan, Vemuri (Correct)
....in high level synthesis. 5 Theory Formal Verification of a Register Allocation Algorithm Register optimization techniques in high level synthesis systems are usually based on graph partitioning or coloring. Minimization algorithms for these graph techniques are known to be either NP hard [6, 10] or NP complete [14] However, polynomial time heuristics have been discovered for solving these problems [2, 8] We will describe our verification approach in the context of one such popular heuristic based on compatibility graphs for carrier based register optimization. 5.1 Overview of the ....
....y, CG) R) wellformed(CG, R) Fig. 8. Example of Level 1 Lemma Introduction mergenodeswellformed.1. 1 : 1] sn = n 1 f 2g (N 1(sn) NOT (sn = sm) AND N 1(sm) 3] cs 1(sn) c1 1) OR cs 1(sm) c1 1) 4] cs 1(sn) c2 1) OR cs 1(sm) c2 1) 5] selectmatch(sn, N 1, E 1) sm [ 6] selectnode( N 1, E 1) cs 1, HP 1) sn [ 7] R 1(r 1) 8] r 1(c1 1) 9] r 1(c2 1) 1] N 1(sm) AND (cs 1(sm) c1 1) AND cs 1(sm) c2 1) 2] N 1(sn) AND (N 1(sm) AND (cs 1(sn) c1 1) AND (cs 1(sm) c2 1) AND (E 1(sn, sm) OR E 1(sm, sn) 3] N 1(sn) AND (cs 1(sn) c1 1) ....
D.L. Springer and D.E. Thomas. "Exploiting the Special Structure of Conflict and Compatibility Graphs in High-Level Synthesis". In Proceedings of ICCAD, pages 254--157, 1990.
Data Path Allocation Techniques for High-level Synthesis.. - Parulkar, Gupta, Breuer (1995) (Correct)
.... has been proven to be NP complete [13] However polynomial time algorithms exist for special graphs such as chordal graphs and interval graphs [14] If the data flow graph description does not contain mutual exclusion constructs and loops, the resulting variable conflict graph is an interval graph [15]. The polynomial time minimum coloring algorithm on interval graphs is a greedy algorithm. At every step the algorithm has a restricted choice of variables and does not allow for an efficient exploration of the solution space to search for a good testability solution. For a more thorough ....
D.L. Springer and D.E. Thomas. Exploiting the Special Structure of Conflict and Compatibility Graphs in High-Level Synthesis. In Proc. Intn'l Conf. on Computer-Aided Design, pages 254-- 257, Nov. 1990.
Optimal Register Sharing for High-Level - Synthesis Of Ssa (Correct)
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D. L. Springer and D. E. Thomas, "Exploiting the special structure of conflict and compatibility graphs in high-level synthesis," IEEE Tr ans. Comput.-Aided Des. Integr .Cir cuits Syst., vol. 13, no. 7, pp. 843--856, Jul. 1994.
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