| Cray Research Inc. Cray T3D System Architecture and Overview. Revision 1.c. Technical report, Cray Research Inc., September 1993. |
.... mutually exclusive, and since the core mechanisms for moving data with low latency and high bandwidth are very similar for cache coherence and block transfer, architects have begun designing machines with hardware support for both a cache coherent shared address space and block transfer of data [1, 9, 12, 14]. Structuring communication in large blocks is crucial on current message passing machines and workstation networks, since the overheads and latencies of sending messages are very high. However, it is not clear what the role of coarse grained messages is on tightly coupled, hardware ....
....transfer is not through a send operation to a processor that requires a matching receive, but by performing a block memory copy from source addresses direcfiy into destination addresses in the application s data structures. Support for this type of copying mechanism is provided in the Cray T3D [12], and is planned for other machines currenfiy being developed [1, 9, 14] Within the load store or block transfer models, communication can be distinguished by whether it is initiated by the consuming processor (receiver initiated) or by the producing processor (sender initiated) In the ....
Cray Research Inc. Cray T3D System Architecture and Overview. Revision 1.c. Technical report, Cray Research Inc., September 1993.
No context found.
Cray Research Incorporated. Cray T3D System Architecture and Overview. Revision 1.C. Technical Report, Cray Research Incorporated. September 1993.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC