| S. Unger and C.-J. Tan, "Optimal clocking schemes for high speed digital systems," in Proc. IEEE Int. Conf. Computer Design, Oct. 1983, pp. 366--369. |
.... other (all input phases were zero) and the corresponding samples at all the delay nodes in CDFG were mutually aligned to each other (all delay node phases were a constant) It is interesting to note that in some sense rephasing corresponds to cycle stealing and wave pipelining in logic synthesis [Lam92, Won89, Ung86, Ish90]. 3. Rephasing: Definition and Intuition The DSP systems that we are interested in have multiple inputs, multiple outputs, and finite state. They accept streams of samples on each of the inputs, and produce streams of samples on each of the output ports. We represent an algorithm for a system by ....
S.H. Unger, C-J. Tan: "Optimal Clocking Schemes for High Speed Digital Systems", IEEE Transactions on Computers, Vol. 35, No. 10, pp. 880-895, 1986.
....Cycle borrowing also known as cycle stealing, retardation, slack steal, and transparent latch is a clocking technique where signal propagation steals a portion of the next clock cycles without changing the functionality of the design. Its application has been discussed in several studies [Noi82, Gla85, Ung86, Ish90]. 1.4 Organization of paper The remainder of the paper is organized as follows. We first introduce key definitions and formally define rephasing. After that we discuss the relationship of rephasing to retiming and other transformations. Using the relationship to functional pipelining, we ....
S.H. Unger, C-J. Tan: "Optimal Clocking Schemes for High Speed Digital Systems", IEEE Transactions on Computers, Vol. 35, No. 10, pp. 880-895, 1986.
No context found.
S. Unger and C.-J. Tan, "Optimal clocking schemes for high speed digital systems," in Proc. IEEE Int. Conf. Computer Design, Oct. 1983, pp. 366--369.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC