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K.G.W. Goossens. Embedding Hardware Description Languages in Proof Systems. PhD thesis, University of Edinburgh, 1992.

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The State Evolution Method for Verifying Hardware Systems - Barringer, Gough.. (1995)   (1 citation)  (Correct)

....within HOL, and has been incorporated into a hardware design framework, offering partially automated verification via the development of proof tactics suitable for hardware systems. At Edinburgh, operational semantics are provided for simplified versions of ELLA, and embedded into the LAMBDA system[17], which supports the semi automated synthesis of circuits from logical constraints. The PVS proof system utilised here, can be employed to model systems directly, and then to support the required proof task[18] Currently these tools based on theorem proving require formal methods expertise in ....

K.G.W. Goossens. Embedding Hardware Description Languages in Proof Systems. PhD thesis, University of Edinburgh, 1992.


A Model of VHDL for the Analysis, Transformation, and.. - Wilsey, Benz, Pandey   (Correct)

....of a semantic model for establishing the static constraints on a properly formed VHDL description. 1 In addition, we also show how this model can be manipulated and transformed into a core set of equivalent components. The static semantics presented in this paper builds on the work of [9, 12, 14, 15, 19] and consequently, we spend little time illustrating the construction of static constraints between elements of the model. Instead, the focus (and chief contribution) of this paper lies with the manipulation and transforms on the static model for design optimization. A larger document defining the ....

....and optimization of CAD tools. Finally, Section VIII contains some closing remarks. II. Related Work Notation Numerous past efforts to develop semantic models for VHDL have been conducted [1, 2, 3, 4, 6, 7, 8, 11, 13, 19, 20, 22] However, with the exception of Van Tassel [19] and Goossens [9], past efforts have concentrated on only the dynamic semantics of VHDL. Van Tassel develops a static semantics for a small subset of VHDL but uses it only to define what it means for a particular VHDL description to be wellformed. Goossens defines type constraints in a static model for ELLA. In ....

Goossens, K. G. W. Embedding Hardware Description Languages in Proof Systems. PhD thesis, University of Edinburgh, Edinburgh, Scotland, December 1992.


Structure and Behaviour in Hardware Verification - Goossens (1993)   Self-citation (Goossens)   (Correct)

....T) equal b T) F) defn b nand a b) b not (b and a b) The example consists of a composition of constants that already have an interpretation. We insist on commencing with the uninterpreted syntax of a structural language; behaviour is a secondary concept, and is provided in an explicit manner [29, 30, 32]. This highlights the fundamental difference between the structure of hardware and the behaviour of the hardware, when it is abstracted using a particular model. In the Boyer Moore system only Brock and Hunt have used this approach [15] Their work is discussed in Section 4. Other Boyer Moore work ....

....applications: we may quantify over circuits, expressing properties that hold for all or particular classes of circuits. Circuits expressions can contain free variables, corresponding to plug in components [29] Circuits may be operated on by transformation functions, which may be proven correct [30], or be the result of formal hardware synthesis functions [15, 32] Interactive synthesis, perhaps based on the operational semantics rules [30] or refinement based strategies [27] is also possible. Operational semantics based formal simulation is another powerful application [31] It may be very ....

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K G W Goossens. Embedding Hardware Description Languages in Proof Systems. PhD thesis, Laboratory for Foundations of Computer Science, Department of Computer Science, University of Edinburgh, December 1992.


The Formalisation of a Hardware Description Language in a Proof.. - Goossens (1993)   Self-citation (Goossens)   (Correct)

....[3, 12, 28, 31, 16] We now explain how hardware has been described in most of the hardware verification literature, and why this has obfuscated the boundary between the structure and behaviour of a circuit. The use of an hdl with associated formal semantics, in contrast, clarifies these issues [13]. We show how a simple NAND gate may be described using an hdl and using higherorder logic to illustrate problems with the latter approach. Using the hardware description language ella [27] two NOT gates, an AND gate, and an OR gate may be described (with minor variations) as follows: FN NOT ....

.... of steps, may be proved about the semantics (and hence the behaviour of conforming simulators) Some hdls that have been formalised include Funnel [28] silage [16] and various subsets of ella [12, 1, 2, 21] and vhdl [31, 30] The remainder of this section describes the semantics for picoella [13] which takes the form of a structural operational semantics [26] It comprises a static semantics describing which programs are well typed, and a dynamic semantics defining the run time behaviour of well typed programs. We will not discuss the static semantics here; it suffices to say that it is ....

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K G W Goossens. Embedding Hardware Description Languages in Proof Systems. PhD thesis, Laboratory for Foundations of Computer Science, Department of Computer Science, University of Edinburgh, December 1992.

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