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K. Fisler. Containment of Regular Languages in Non-Regular Timing Diagrams Languages is Decidable. In CAV. Springer Verlag, 1997.

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Efficient Decompositional Model-Checking for Regular.. - Amla, Emerson, Namjoshi (1999)   (Correct)

....are given. Many other researchers [1, 22, 19, 4] have formalized timing diagrams and translated them to other formalisms (interval logics, trigger graphs etc) Formal notions of timing diagrams are also proving to be useful in test generation and logic synthesis (cf. 23, 15, 12] Fisler [13, 14] proposes a timing diagram syntax and semantics that allows non regular languages, and finds that these languages occur at all levels of the Chomsky hierarchy. The paper [14] provides a decision procedure that determines whether a regular language is contained in an unambiguous timing diagram ....

....of timing diagrams are also proving to be useful in test generation and logic synthesis (cf. 23, 15, 12] Fisler [13, 14] proposes a timing diagram syntax and semantics that allows non regular languages, and finds that these languages occur at all levels of the Chomsky hierarchy. The paper [14] provides a decision procedure that determines whether a regular language is contained in an unambiguous timing diagram language, and [13] provides an algorithm that translates a certain class of timing diagrams into CTL [5] A key difference with our work is that while this algorithm is ....

[Article contains additional citation context not shown here]

K. Fisler. Containment of Regular Languages in Non-Regular Timing Diagrams Languages is Decidable. In CAV. Springer Verlag, 1997.


A Modal Fixpoint Logic with Chop - Müller-Olm (1999)   (3 citations)  (Correct)

....can be translated. An FLC based model checking system could handle non regular specification formalisms that are beyond the reach of modal mu calculus based model checkers. An interesting example of such a formalism from a practical point of view are the timing diagrams studied by K. Fisler in [5]. It is a topic of future research whether they can actually be embedded into FLC. A simple global model checking algorithm for FLC and finite state processes can straightforwardly be constructed from the usual iterative computation of fixpoints. This procedure in general has an exponentially ....

K. Fisler. Containment of regular languages in non-regular timing diagram languages is decidable. In CAV'97, LNCS 1254. Springer-Verlag, 1997.


Model Checking Synchronous Timing Diagrams - Amla, Emerson, Kurshan, Namjoshi   (3 citations)  (Correct)

....as temporal logic or automata yield formulas or automata that are of Work supported in part by NSF grant 980 4736 and TARP 003658 0650 1999. small size. Previous work on model checking for timing diagrams, e.g. with Symbolic Timing Diagrams [10, 5, 7] with non regular timing diagrams [12] and with Presburger arithmetic [3] provides algorithms that are, in the worst case, of exponential or higher complexity in the size of the diagram. Our timing diagram syntax facilitates a decompositional, polynomial time algorithm for model checking. Our experience with verifying Lucent s PCI ....

....[5, 7] allows users to graphically specify properties as Symbolic Timing Diagrams (STD s) 10] STD s are, however, asynchronous in nature and cannot explicitly tie events to the clock. Moreover, the translation algorithm is monolithic, and in general results in an exponential translation. Fisler [12] provides a procedure to decide regular language containment of non regular timing diagrams, but the model checking algorithms have a high complexity (PSPACE) Cerny et al. present a procedure [16] for verifying whether the finite behavior of a set of action diagrams (timing diagrams) is ....

K. Fisler. Containment of Regular Languages in Non-Regular Timing Diagrams Languages is Decidable. In CAV. Springer Verlag, 1997.


RTDT: A Front-End for Efficient Model Checking of.. - Amla, Emerson.. (2001)   (Correct)

....for STDs may be exponential. In later work (cf. 11] a compositional veri cation methodology is used to verify STD properties. This work uses timing diagrams as a convenient notation for expressing temporal properties, while the assume guarantee reasoning is left to the veri er. Fisler [8] provides a procedure to decide regular language containment of non regular timing diagrams, but the model checking algorithms have a high complexity (PSPACE) They [9] have implemented a monolithic translation algorithm that compiles a regular subset of these diagrams into automata. Unlike our ....

K. Fisler. Containment of Regular Languages in Non-Regular Timing Diagrams Languages is Decidable. In CAV. Springer Verlag, 1997.


Efficient Decompositional Model-Checking for Regular.. - Amla, Emerson, Namjoshi (1999)   (Correct)

....that this framework permits efficient model checking of timing specifications that are used in practice. Our review of industrial data books and discussions with engineers indicate that RTD s are sufficiently expressive for most industrial verification needs. With the exception of Fisler s work [13, 14], where the model checking algorithms have high complexity, other prior work considers timing diagram models that are at most as expressive as RTD s. The algorithm is linear in the structure size, polynomial in the number of diagram points and dependencies and in the unary size of the constants. ....

....a set of action diagrams (timing diagrams) is consistent; 17] uses constraint logic programming to check if a system satisfies finite action diagram specifications. Formal notions of timing diagrams have also proved to be useful in test generation and logic synthesis (cf. 27, 15, 12] Fisler [13, 14] proposes a timing diagram syntax and semantics that allows non regular languages, and finds that these languages occur at all levels of the Chomsky hierarchy. The paper [14] provides a decision procedure that determines whether a regular language is contained in an unambiguous timing diagram ....

[Article contains additional citation context not shown here]

K. Fisler. Containment of Regular Languages in Non-Regular Timing Diagrams Languages is Decidable. In CAV. Springer Verlag, 1997.


Model Checking Synchronous Timing Diagrams - Amla, Emerson, Kurshan, Namjoshi (2000)   (3 citations)  (Correct)

....work was supported in part by NSF grant 980 4736 and TARP 003658 06501999. such as temporal logic or automata yield formulas or automata that are of small size. Previous work on model checking for timing diagrams, e.g. with Symbolic Timing Diagrams [10, 5, 7] with non regular timing diagrams [12] and with Presburger arithmetic [3] provides algorithms that are, in the worst case, of exponential or higher complexity in the size of the diagram. Our timing diagram syntax facilitates a decompositional, polynomial time algorithm for model checking. Our experience with verifying Lucent s PCI ....

....properties as Symbolic Timing Diagrams (STDs) 10] STDs cannot, however, express real time properties or don t cares; both are important in representing synchronous timing diagrams. Moreover, the translation algorithm is monolithic, and in general results in an exponential translation. Fisler [12] provides a procedure to decide regular language containment of non regular timing diagrams, but the model checking algorithms have a high complexity (PSPACE) Cerny et al. present a procedure [16] for verifying whether the finite behavior of a set of action diagrams (timing diagrams) is ....

K. Fisler. Containment of Regular Languages in Non-Regular Timing Diagrams Languages is Decidable. In CAV. Springer Verlag, 1997.


Timing Diagrams: Formalization and Algorithmic Verification - Fisler (1998)   (4 citations)  Self-citation (Fisler)   (Correct)

....in the Netherlands. jolli98.tex; 30 11 1998; 11:36; p.1 2 In contrast, diagrammatic logics provide a solid foundation for both reasoning and theoretical analyses. This paper presents a timing diagram logic and a corresponding decidability result. The logic, which has been presented before [8], is unique because it expresses certain context free and context sensitive languages. The decidability result shows that timing diagram specifications can be verified algorithmically against designs with infinite behaviors. This is significant because timing diagrams express different properties ....

....algorithmically against designs with infinite behaviors. This is significant because timing diagrams express different properties than the formalisms currently used in automated verification. A preliminary version of this result, covering only designs with finite behaviors, appeared previously [8, 10]; the extension to infinite behaviors is new. Our results also provide preliminary insight into the potential role of diagrammatic representations in algorithmic verification. Although human factors in design practice inspired our research into diagrammatic representations, we are interested in ....

[Article contains additional citation context not shown here]

Kathi Fisler. Containment of regular languages in non-regular timing diagram languages is decidable. In Proceedings of the International Conference on Computer-Aided Verification (CAV), 1997.


Using a Visual Formalism for Design Verification in.. - Schlör, Josko, Werth (1998)   (Correct)

No context found.

K. Fisler. Containment of regular languages in non-regular timing diagram languages is decidable. In Orna Grumberg, editor, 9th International Conference on Computer Aided Verification, Lecture Notes in Computer Science 1254, pages 155--166. Springer-Verlag, 1997.

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