Berstis V. (1989) The V Compiler: Automating Hardware Design. IEEE Design and Test, 6, 2, p. 8-17.  Home/Search   Document Not in Database   Summary   Related Articles

....comes form the schedule. Therefore, scheduling and allocation are strongly interdependent tasks. The most straightforward approach to this problem is to set some limit (or no limit at all) on the resource cost and then to schedule, as it is done in systems CMUDA [12,18,49] Flamel [47] and V [5]. A more flexible approach is to iterate the whole process changing the resource limits until a satisfactory design has been found. This approach is used in MIMOLA [26,50] and Sehwa [31] Another approach is to develop the schedule and allocation simultaneously, as in systems HAL [33,34] and MAHA ....

....In order to be more realistic the communication delay has to be considered in high level synthesis. Since allocation involves assigning the operations to hardware, it also determines the communication overhead. Thus, in high level synthesis the scheduling and allocation are closely interrelated [5,12,19,26,28,31 33,37,47,49,50]. In order to have an optimal design, both should be performed simultaneously. Due to the time complexity, however, many systems perform them separately, or introduce iteration loops between the two tasks, as it was the case in our GAM scheduling allocation approach. We may conclude that the key ....

Berstis V. (1989) The V Compiler: Automating Hardware Design. IEEE Design and Test, 6, 2, p. 8-17.

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