M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli. Synthesis of software programs from CFSM specifications. In Proceedings of the Design Automation Conference, June 1995.  Home/Search   Document Not in Database   Summary   Related Articles   Check

.... (if any) The software synthesis technique that we use in order to exploit DCs is based on the use of Binary Decision Diagrams (BDDs) 5] to optimally synthesize software (in particular C code) from a specification in the form of Finite State Machines extended with integer arithmetic capabilities [7, 2]. That technique uses a direct mapping between BDD nodes and low level C statements in order to derive a highly optimized implementation of the FSM transition relation. We use this synthesis path because it is publicly available as part of an embedded system design tool called POLIS [2] The ....

....a set of input and output events. States of the CFSM are events that are fed back. Events are entities that may occur at determinate instants of time and may or may not carry a value. Given a BDD representation of the characteristic function of the set of transitions of a CFSM, the technique of [7] derives a fragment of C code, as follows: A BDD node associated with an input variable becomes an ifthen else statement, branching to the statements corresponding to the BDD children nodes. A BDD node associated with an output variable becomes an assignment of the value corresponding to ....

M. Chiodo et al. Synthesis of Software Programs from CFSM Specifications. In Proc. Design Automation Conference, June 1995.

....scheduling (respecting timing constraints) is developed starting from a specification in Verilog. In [Gupta et al. 1994] and [Gupta and Micheli 1994] starting from a specification in HardwareC, a CDFG is derived; several threads are extracted from it and a scheduling algorithm is proposed. In [Chiodo et al. 1995] a synthesis methodology is proposed which starts from a CFSM specification of the system. Using this specification model it is possible to obtain an effective hardware implementation. In this approach software synthesis takes place by using an acyclic CDFG obtained from the CFSM specification. ....

Chiodo, M., Giusto, P., Hsieh, H., Jurecska, A., and alii. 1995. Synthesis of Software programs from CFSM specifications. In Proceedings of the Design Automation Conference (June 1995).

....to multilevel optimization techniques as is the case in conventional compiler frameworks. Software synthesis refers to the process of generation of high level language code from abstract (behavioral) models. Prior work has been done on code generation from dataflow or synchronous dataflow models [9, 14, 15]. Our work builds upon the Timed Descision Table (TDT) model which has been used for hardware description language (HDL) based optimizations and HDL code restructuring [13] This model captures behavioral system descriptions which can then be used for hardware and software synthesis. Behavioral ....

....and swapping. The TDT model also facilitates easy identification of duplicate actions and subsequent action sharing. 3 Software Synthesis from TDTs Synthesis of software from TDTs requires a selection of a schedule of operations and subsequent HLL code generation according to a chosen style [14, 15]. Scheduling a TDT eliminates concurrent c entries from the dependency table. Operation scheduling is an important aspect of the software synthesis process. However, for a given scheduling strategy, choice of coding style has a significant impact on the quality of the eventual code. Our approach ....

M.Chiodo, P.Giusto et al, Synthesis of Software Programs from CFSM Specifications, Design Automation Conference,1995

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M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli. Synthesis of software programs from CFSM specifications. In Proceedings of the Design Automation Conference, June 1995.

....in a high level formal language, describing the functionality of each block and how blocks are connected together. After translating this specification into an intermediate format, all sorts of optimization can be carried out to reduce the size and increase the speed of execution (see, e.g. [4]) Software synthesis in POLIS is based on a ControlData Flow Graph (CDFG) called S graph [4] The S graph is considerably simpler than the CDFG used, for example, by a general purpose compiler because its purpose is only to specify the transition function of a single CFSM. An S graph computes a ....

....are connected together. After translating this specification into an intermediate format, all sorts of optimization can be carried out to reduce the size and increase the speed of execution (see, e.g. 4] Software synthesis in POLIS is based on a ControlData Flow Graph (CDFG) called S graph [4]. The S graph is considerably simpler than the CDFG used, for example, by a general purpose compiler because its purpose is only to specify the transition function of a single CFSM. An S graph computes a function from a set of finite valued variables to a set of finite valued variables. The input ....

M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli. "Synthesis of Software Programs from CFSM Specifications " Proceedings of the Design Automation Conference, June 1995.

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M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli. "Synthesis of Software Programs from CFSM Specifications" Proceedings of the Design Automation Conference, June 1995.

....constraint to be missed, and a measure of urgency that performs some limited timing constraint lookahead. Unbounded time operations, on the other hand, are implemented by a call to the runtime scheduler, which may cause a context switch in favor of another more urgent thread. Chiodo et al. [134] also propose a software synthesis method from extended asynchronous Finite State Machines (called Codesign Finite State Machines, CFSMs) The method takes advantage of optimization techniques from the hardware synthesis domain. It uses a model based on multiple asynchronously communicating CFSMs, ....

M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli, "Synthesis of software programs from CFSM specifications," in Proc. of the Design Automation Conf., June 1995.

....purpose of this document is to informally introduce the codesign environment Polis 1 to a prospective user. It does not cover in detail, however, the supported specification languages ( 14] nor the underlying computational models ( 10] nor the implemented analysis and synthesis algorithms ([12, 13, 2]) The most recent summary of the overall Polis methodology and algorithms is presented in [3] The document is organized into sections. We recommend reading all of them even if you are not planning to use some features, because information about some commands is interspersed along the way. The ....

....cause an overflow. By default, this information is printed on the standard error. 88 9 Software synthesis This section describes how the software generation and the timing and code size estimation commands work. It does not explain the underlying algorithms (the interested reader is referred to [13] and [32] for more details) Some of the relevant commands have been introduced already, namely in Section 6.1. Here we describe only the new commands, and some more specific options dealing with software optimization. In this section we also describe the method for using micro controller ....

M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli. Synthesis of software programs from CFSM specifications. In Proceedings of the Design Automation Conference, June 1995. 122

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M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli. Synthesis of software programs from CFSM specifications. In Proceedings of the Design Automation Conference, June 1995.

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M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli. Synthesis of software programs from CFSM specifications. In Proceedings of the Design Automation Conference, June 1995.

....customary to extend them with the capability to perform assignments of expressions to variables, and to use comparisons to determine transition conditions. The purpose of this paper is to describe algorithms for an optimizing compiler from an FSM specification to object code on a micro controller ([4]) This compiler is not to be compared against traditional compilers for a programming language like C or Pascal, because we are solving a much simpler and more restricted problem. But exactly for this reason we can afford to perform optimizations that are either impossible or simply too expensive ....

.... for this reason we can afford to perform optimizations that are either impossible or simply too expensive in the general case ( 1] We use, like most compilation strategies, a control data flow diagram (called s graph, for software graph, in the following) as an intermediate data structure [4]. The s graph is simpler than general control data flow diagrams, because it needs only to represent a single function from a discrete domain (the set of FSM inputs) to a discrete domain (the set of FSM outputs) As such, it requires only two primitives: conditional branch and assignment (using ....

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M. Chiodo, P. Giusto, H. Hsieh, A. Jurecska, L. Lavagno, and A. Sangiovanni-Vincentelli. Synthesis of software programs from CFSM specifications. In Proceedings of the Design Automation Conference, June 1995.

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