J. Oberg, A. Kumar, and A. Hemani, "Grammar-based hardware synthesis of data communication protocols," in Proc. Int. Symp. Syst. Level Synthesis, 1996, pp. 14--19.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....specifications are interpreted as automaton descriptions. The synthesis algorithms for the adaptor component creates a product automaton [42] and withdraws all product states which can not be reached, or which can not be reached by a constraint of cause and action on the received and sent signals [72, 79]. In case of a set of solutions the algorithm chooses the one with the shortest path. This approach can synthesise adaptors for syntactical re ordering of information. The interface descriptions define the order of the required and provided information. The semantical mapping of the information ....

J. Oberg, A. Kumar, and A. Hemani. Grammar-based Hardware Synthesis of Data Communication Protocols. In The 9th International Symposium on System Synthesis, pages 14--19, La Jolla, USA, November 1996.

....in the form of parameters such as arbitration priorities, block transfer sizes, etc. Choosing appropriate values for these parameters can significantly impact the latency and transfer bandwidth associated with inter component communication. Finally, there is a body of work on interface synthesis [16, 17, 18, 19, 20, 21, 22, 23], which deals with automatically generating efficient hardware implementations for component to bus or component to component interfaces. These techniques address issues in the implementation of specified protocols, and not in the customization of the protocols themselves. In summary, we believe ....

J. Oberg, A. Kumar, and A. Hemani, "Grammar-based hardware synthesis of data communication protocols," in Proc. Int. Symp. System Level Synthesis, pp. 14--19, 1996.

....and (2) to replace the TLI of the IP core model with this controller (see Fig. 2) The synthesis output is a synthesizable VHDL RT implementation of the IP core with a system specific interface implementation. 3.1. Generation of Interface Controller Machines Inspired by the work in [7] [5] we represent the protocol of a transaction that is specified in the interface with a regular expression r. R describes the set L of legal signal sequences at the module ports for a transaction using this protocol. A symbol oe in the alphabet Sigma of the regular expression r is specified as the ....

J.Oberg, A. Kumar, and A. Hemani. Grammar-based hardware synthesis of data communication protocols. In Proceedings of the 9th International Symposium on System Synthesis, La Jolla, CA, November 1996.

....design of communication controller hardware which is especially suited for (but not limited to) complex, bit serial protocols is presented. The methodology is based on synthesis of controller hardware from a formal high level specification of the protocol. Compared to previous work [6] 8] [4], 5] 10] our approach is unique in two aspects: First, the formalism that is used for protocol specification has been realized as an extension to the system description language SystemC, called SystemC . This ensures that protocol specifications become an integral part of the system ....

....In [8] the system Clairvoyant was presented which generates controller hardware from production based protocol specifications. An extension to this system is the Protocol Compiler [10] which uses a graphical hierarchical regular expression based language for protocol specification. In [4], 5] regular grammars are used for protocol descriptions which can be synthesized into a VHDL description of a corresponding protocol controller by means of the PRO GRAM system. The drawback of these synthesis approaches is that the formalisms used to capture the protocol specification are not ....

J.Oberg, A. Kumar, and A. Hemani. Grammar-based hardware synthesis of data communication protocols. In Proceedings of the 9th International Symposium on System Synthesis, La Jolla, CA, November 1996.

....VHDL RT implementation of the IP core with a system specific interface implementation. with respect to the SYNOPSYS VHDL synthesis subset during interface synthesis, MODIS replaces this statement with VHDL code 3. 1 GENERATION OF INTERFACE CONTROLLER MACHINES Inspired by the work in [3] [11] we represent the protocol of a transaction that is specified in the interface with a regular expression r. R describes the set L of legal signal sequences at the module ports for a transaction using this protocol. A symbol oe in the alphabet Sigma of the regular expression r is specified as the ....

J.Oberg, A. Kumar, and A. Hemani. Grammar-based hardware synthesis of data communication protocols. In Proceedings of the 9th International Symposium on System Synthesis, La Jolla, CA, November 1996.

....the mapping of hardware software communication on to DMA controllers is described by Eisenring and Teich [11] but their approach is limited to a set of standard APIs. Oberg et al. present a communication protocol synthesis tool that specifies the design in a special purpose language ProGram [34], which is based on context free grammar, the synthesizable subset is limited to regular grammar with attributed conditions. The specified protocols are synthesized into hardware. Seawright et al. 29] have a similar approach but instead of grammar they use a graphical version of regular ....

....in ProGram deal with sequences of allowed events as opposed to states and state transitions in an FSM model. In contrast to parsers for compilers ProGram allows for several concurrent input and output streams. The ProGram description is synthesized into a set of untimed extended state machines [25, 34], which is the input to the architecture mapping procedure described in sections 5 and 6. Figure 4 shows that the mapping procedure uses data from two libraries to generate the architecture specific code. The first library captures the information on the operating system architecture (OSLib) and ....

[Article contains additional citation context not shown here]

J. Oberg, A. Kumar, and A. Hemani, Grammar-based hardware synthesis of data communication protocols, Proceedings of the 9th International Symposium on System Synthesis, pp. 14--19, 1996.

....etc. usedbythechannels buses in the selected topology. The VSI Alliance on chip bus working group [14] has recognized that a multitude of bus protocols will be needed in order to serve the wide range of SOC communication requirements. Finally, there is a body of work on interface synthesis [15, 16, 17, 18, 19, 20, 21, 22], which deals with automatically generating efficient hardware implementations for component to bus or component to component interfaces. These techniques address issues in the implementation of specified protocols, and not in the customization of the protocols themselves. In summary, we believe ....

J. Oberg, A. Kumar, and A. Hemani, "Grammar-based hardware synthesis of data communication protocols," in Proc. Int. Symp. System Level Synthesis, pp. 14--19, 1996.

....in the form of parameters such as arbitration priorities, transfer block sizes, etc. Choosing appropriate values for these parameters can significantly impact the latency and transfer bandwidth associated with inter component communication. Finally, there is a body of work on interface synthesis [16, 17, 18, 19, 20, 21, 22, 23], which deals with automatically generating efficient hardware implementations for component to bus or component to component interfaces. These techniques address issues in the implementation of specified protocols, and not in the customization of the protocols themselves. In summary, we believe ....

J. Oberg, A. Kumar, and A. Hemani, "Grammar-based hardware synthesis of data communication protocols," in Proc. Int. Symp. System Level Synthesis, pp. 14--19, 1996.

....last twenty years, advances in circuit fabrication technology have increased device densities and as a consequence, they have increased design complexity. To manage continuously emerging tasks, designers have moved towards higher levels of abstraction [31] and language based design descriptions [14, 16, 27, 28, 21], which are closer to the way they conceive their work. However, each design must be described, eventually, at the lowest level (e.g. layout masks) in order to be fabricated. The transformation from one level of abstraction to the next is performed by various synthesis processes. High level or ....

....compilation using production based specications. However, only control path synthesis is performed (datapath synthesis is not considered at all) The presented examples are very limited, the largest being a part of the 8251 controller benchmark. As an extension to Clairvoyant, Oberg et al. [21, 22] have presented PRO GRAM, a YACC like grammar based synthesis environment for data communication protocols. In this work, a higher 42 Advances in Attribute Grammar Driven Hardware Compilation level of abstraction (to dene the circuit behavior) is used and the architecture of the nal design is ....

J. Oberg, A. Kumar, and A. Hemani. Grammar-based hardware synthesis of data communication protocols. In 9th International Symposium on System Synthesis, pages 1419. ACM/IEEE, 1996.

....memories etc. communication primitives is a major part of the design effort and is now being treated as a research problem [7, 8] Furthermore, languages and notations that were not main stream in the hardware design community, are being explored to specify communication dominated functionality [9, 10] The structural and physical domains of the Y chart are merged into this domain because movement from a topological to a layout model is considered as a refinement operation, not an inter domain movement. The layout level is based on principles of geometry and uses physical units to describe ....

J. Öberg, A. Kumar, and A. Hemani, "Grammar-based Hardware Synthesis of Data Communication Protocols", Proc. of Int. Symposium on System Synthesis, 1996.

....already presented in the literature. The grammar based specification employed in this work has been inspired mainly by the work of Seawright and Brewer [12] who demonstrated how effective regular expression could be for protocol and control intensive specifications. Hemani et al. also report in [9] the use of grammarbased specification for the synthesis of hardware for data communication protocols, although the specific problem of interface synthesis is not addressed. The use of derivatives of regular expressions was introduces by Brzozowski [5] The particular way in which the derivatives ....

J. Oberg, A. Kumar, and A. Hemani. Grammar-based hardware synthesis of data communication protocols. In Proceedings of the 9 th International Symposium on System Synthesis, pages 14--19, La Jolla, CA, November 6 - 8 1996.

....built from such grammar specification. Grammar rules can be annotated with actions to be taken when a particular grammar rule is recognized. This is the principle of grammar based hardware synthesis. There are a number of grammar based hardware synthesis systems in the academic world [1, 2, 3, 4, 5]. 2] is a commercial version of [1] Though these systems are based on the same essential idea, they differ in their syntax, synthesis strategy, target architecture and the methodology for using them. Functional Model Bit true Model Rate true Model Cycle true Model Figure 1. The four levels ....

.... word.1[5. 0] word2; configure1: cond(cfg i1 =0) cond(cfg i1 16) word word fir1Coeff[cfg i1] word.1[5. 0] word2; integrator: word iBuffer[0] word reset(res=1) initialization statements; reset(sdInitialised=FALSE) is described in [5, 7]. This has been extended for the presented methodology. However, this synthesis strategy is not the focus of this paper and will be soon published as a separate paper. 5 Results To evaluate the efficacy of our methodology we applied it to two examples. One of them is the sigma delta demodulator ....

J. berg, A. Kumar, A. Hemani, "Grammar-based Hardware Synthesis of Data Communication Protocols ", In Proc. of ISSS'96, pp 14-19, La Jolla, California, Nov. 6-8, 1996.

....tool called Clairvoyant in [7] 8] The tool uses a grammar based hardware description language to specify and synthesize digital synchronous hardware systems. The tool was later further developed into a commercial tool, then called DALI[9] now called the Synopsys Protocol Compiler [10] In [12], the ProGram language was introduced together with a methodology for performing design space exploration of the input port sizes. The methodology was extended in [13] with two simple schedule algorithms for scheduling of output assignments, to allow design space exploration of the output port ....

J. berg, A. Kumar, A. Hemani, "Grammar-based Hardware Synthesis of Data Communication Protocols", In Proc. of ISSS'96, pp 14-19, La Jolla, California, Nov. 6-8, 1996.

....is needless to say, however, that the assignments of weights and the formula for computing the suitability index is still very subjective. 3 Languages under Evaluation The languages under evaluation represent different paradigms and features. In particular, Erlang [6] VHDL, SDL[12] and ProGram [13, 14] have explicit concurrency; VHDL, C , and SDL are imperative languages; Haskell [15] Erlang, and ProGram are declarative languages; C and SDL are object oriented languages; C , SDL, Erlang, and Haskell have mostly been used for software development; VHDL and ProGram have been used for ....

J. Öberg, A. Kumar, and A. Hemani, "Grammar-based Hardware Synthesis of Data Communication Protocols", Proceedings of the 9th International Symposium on System Synthesis, pp. 14 - 19, 1996.

....and implementation independent approach for device driver modelling. For the bus interface process, which translates the bus protocols of the two devices, exists several approaches to generate bus interfaces from architect independent descriptions [2,3,4,7,8] Our approach extends ProGram [12] to model both device drivers and bus initilize( open( read( data) write( data) close( interrrupt handler( RTOS Application program Device drivers Interrupt handlers 00 01 02 03 Bus interface process Device dev 1 dev 2 dev 3 Device register thread 1 thread 2 ....

....model bus interfaces, Gajski et al. use a program state machine (PSM) to specify interfaces but in all examples they use the HDL capability of the PSM to model interfaces. berg et al. present a communication protocol synthesis tool that specifies the design in a special purpose language ProGram [12], which is based on context free grammar, the synthesizable subset is limited to regular grammar with attributed conditions. Seawright et al. 9] have a similar approach but instead of grammar they specify the behaviour with a graphical version of regular expressions. Table 1 shows a comparison ....

[Article contains additional citation context not shown here]

J. Öberg, A. Kumar, A. Hemani, "Grammar-based Hardware Synthesis of Data Communication Protocols", In Proc. of the 9th ISSS, Nov. 1996, pp. 14-19.

....grammars that are executable, because they are a notational variant of a class of Prolog programs. Usability: Today Prolog is a mature language. Many commercial tools and good public domain software is widely available for every conceivable platform. An ISO standard exists. 4. 7 ProGram ProGram [18, 19, 20] is a Grammar based language for hardware synthesis of data communication Protocols and Interfaces. It has been developed at ESDLab. The main characteristics of ProGram are: Declarative: Transitions are entered as production rules. A production rule is described hierarchically from atomic ....

J. Öberg, A. Kumar, and A. Hemani, "Grammar-based Hardware Synthesis of Data Communication Protocols", Proceedings of the 9th International Symposium on System Synthesis, pp. 14 - 19, 1996.

....for entering the production rules, called frames, in a hierarchical manner together with their actions. As with Clairvoyant, DALI supports actions in a host language (VHDL or Verilog) In addition, DALI has some inbuilt simple data manipulation and communication primitives. Our approach [7][8] is similar to the other Production based approaches to the extent that the input is a production based specification and the output is in RT level VHDL. However, the input to our compiler, a Production based language called ProGram (Protocol Grammar) is targeted for specification and ....

....loops in the specification, the ProGram compiler produces a few extra states that could easily be reduced out using known state optimisation methods. The ProGram compiler outputs RTL code written specifically for the backend synthesis tool. Details on how the synthesis is performed is described in [7][8] Comparing Conventional HLS with Grammar Based Hardware Synthesis: A Case Study 4 3. The Application The chosen application for this case study is the Intel 8251A Programmable Communication Interface [9] which is an enhanced version of the industry standard Intel 8251 Universal ....

J. Öberg, A. Kumar, A. Hemani, "Grammar-based Hardware Synthesis of Data Communication Protocols", In Proc. of ISSS'96, pp 14-19, La Jolla, California, Nov. 6-8, 1996.

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J. Oberg, A. Kumar, and A. Hemani, "Grammar-based hardware synthesis of data communication protocols," in Proc. Int. Symp. Syst. Level Synthesis, 1996, pp. 14--19.

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