M.Genoe, L.Claesen, E.Verlind, F.Proesmans, and H.De Man, "Illustration of the SFG-tracing multi-level behavioral verification methodology, by the correctness proof of a high to low level synthesis application in Cathedral-II", Proc. IEEE Int. Conf. on Computer Design, Cambridge MA, Oct. 1991.  Home/Search   Document Not in Database   Summary   Related Articles   Check

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M. Genoe, L. Claesen, E. Verlind, F. Proesmans, and H. De Man, "Illustration of the SFG-Tracing multi level behavioral verification methodology," in Proc. ICCD'91, Cambridge, MA, Oct. 1991, pp. 338--341.

....performed in order to improve parallelism or communication cost [5, 6] Research funded by ESPRIT Project SPRITE (2260) y Professor at K.U.Leuven Verification of steps during design has been addressed by many people, each differing by methodology and or level of abstraction used. Both [7] and [8] proof the behavioral equivalence between a specification and implementation on different abstraction levels. However they have the restriction that ordering of specification and implementation in terms of indexed signals and number of loops, must be the same in order to proof equivalence. ....

....Then the two sets of inequalities have to compared and proven equal. In section 4 it will be shown that this can be done by using a combination of the IRISA Chernikova algorithm [20] and the Omega Test system [21] The method presented in this paper can be efficiently combined with SFG tracing [7] or symbolic flow graph checking [8] While they can proof the equivalence over different abstraction levels, index and loop ordering at each of these levels can be verified with the method presented in this paper. In combination, this provides a very powerful formal verification approach for ....

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M.Genoe, L.Claesen, E.Verlind, F.Proesmans, and H.De Man. "Illustration of the SFG-Tracing Multi-Level Behavioral Verification Methodology, by the Correctness Proof of a High to Low Level Synthesis Application in CATHEDRAL-II". In Proc. IEEE ICCD-91, Cambridge MA, October 1991.

....in methods like [8] and its recent followers, where the correctness of (micro)processors is proven. On the other hand, dataflow based methods start from the assumption that the control flow (especially loop related) ordering of operations in the specification is not changed during the synthesis [6, 18]. This is not acceptable in our application domain where this modification is a major source of optimization, as already indicated. Another approach is based on a correctness preserving methodology [11, 12] With this approach a correct design can be obtained, but designers are limited in the ....

....index values. For the difference of domains step, also a formulation towards the Omega Test System is used, including some new heuristics, as demonstrated further on. The correspondence between the (scalar) relations under the preconditions has to be verified with more conventional methods (e.g. [6, 18]. 2.2 Formal Model and Single Assignment Assumption The formal model used to prove the behavioural equivalence has been described in detail in [17] and is not the topic of this paper. It is defined using the syntactic domains which describe the elements in the language, the semantic domains which ....

M.Genoe, L.Claesen, E.Verlind, F.Proesmans, and H.De Man, Illustration of the SFG-tracing multi-level behavioral verification methodology, by the correctness proof of a high to low level synthesis application in Cathedral-II, Proc. IEEE Int. Conf. on Computer Design, Cambridge MA, Oct. 1991.

.... already to formally prove the correctness of the cryptographic chip with respect to its higher level behavior by means of the SFG Tracing verification methodology [12] This methodology has currently successfully been applied already for the automatic verification of high level synthesis results [13]. Acknowledgements The authors wish to acknowledge the help of many colleagues who have contributed in the succesful realization of this project: C. Das, B. Demey, R. Govaerts, D. Lambrichts, G. Vanderwegen, J. Vandewalle, M. Van Eylen, A. Vanhelmont, G. Vanwijnsberghe and P. Wambacq. ....

M. Genoe, L. Claesen, e.a. "Illustration of the SFG-Tracing multi-level behavioral verification methodology, by the correctness proof of a high to low level synthesis application in CATHEDRAL-II", Proc. ICCD-91, Cambridge, October 14-16, 1991, pp. 338-341.

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M.Genoe, L.Claesen, E.Verlind, F.Proesmans, and H.De Man, "Illustration of the SFG-tracing multi-level behavioral verification methodology, by the correctness proof of a high to low level synthesis application in Cathedral-II", Proc. IEEE Int. Conf. on Computer Design, Cambridge MA, Oct. 1991.

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