Goslin, G. R. "Using Xilinx FPGAs to Design Custom Digital Signal Processing Devices", Proceedings of the DSP 1995 Technical Proceeding pp.595-604,12 Jan 1995.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....the use of one dimensional DCTs (1D DCTs) of the rows and subsequent 1D DCTs of the columns. This is possible because of the separability of the 2D DCT. The 1DDCTs can be expressed as follows: Distributed arithmetic is a key technology for numerous digital signal processing applications (see e.g. [7]) # # # # # = # # # # # # # = 16 ) 1 2 ( cos 2 ) 16 ) 1 2 ( cos 2 0 7 0 # # l m l c a with x a l m x l c y m m m l m m m l ( 2) Utilizing the property of the factors a m to be symmetric in m, we only need to sum up four product terms: # # ....

G.R. Goslin, "Using Xilinx FPGAs to Design Custom Digital Signal Processing Devices," Xilinx Inc., Appnotes 1998.

....(5) y (6) y (7) y (8) y (7) y (9) y (8) y (9) L sign bit Fully Efficient Bit Level Systolic Array Architecture (4 Taps by 4 Bits) Array Cells 535353 6. 5 Distributed Arithmetic The following section describes DA, and is drawn from information presented in [MM99, Whi89, Gos96a, Gos95, Gos96b, New95, Xilb] DA works by distributing the bit arithmetic of the sum of products (also called the vector dot product) used to calculate the FIR filter output given in Equation (6.1) This equation will be re written as (6.2) where A FIR filter is typically implemented with some ....

Gregory R. Goslin. "Using Xilinx FPGAs to design custom digital signal processing devices." In DSPX

....of FPGAs offer them many advantages over their more traditional competitors, digital signal processors. In the following paragraphs, several aspects of the applicability of reconfigurable computing in DSP are reviewed. The implementation of a fast multiplier in FPGAs is investigated in [Gos97]. It is noted, that array multipliers are probably the most common form of a multiplier. Array multipliers form all the product bits at once, which is a fast way of multiplying 41 two numbers since all it takes is the time for the signals to propagate through the gates that constitute the ....

....of gates, and therefore they are not economical for MAC intensive applications, especially if the word widths are not small. A better solution to implement multipliers at least in the Xilinx FPGA architecture is to use serial distributed arithmetic, whose detailed elaboration can be found in [Gos97]. The main advantage of serial distributed arithmetic is its ability to multiply arrays in a constant amount of time. An interesting way to increase the performance of digital signal processors is to use a reconfigurable coprocessor FPGA as an accelerator for the signal processor [Ros97b] Since ....

Gregory R. Goslin: "Using Xilinx FPGAs to Design Custom Digital Signal Processing Devices", Xilinx Corportion 1997. Available from

....operations with fixed operand values for the entire computation. Several CCM applications have used this technique to reduce hardware and improve circuit speed. Digital filters designed within FPGAs propagate filter coefficients into multipliers to free hardware for additional functionality [52, 53, 54]. One such dedicated IIR filter has been shown to fit in half the space of its generalpurpose counterpart [55] Other application areas demonstrating this technique within FPGAs include neural networks [56, 57] and text searching [51, 58, 59] 2.2.2 Exploitation of Concurrency Another ....

....w 1 X w 2 X w N 2 X w N 1 x[n] 0 y[n] Figure 3.4: Constant Propagated Special Purpose FIR Filter. onto the configurable resources as needed by the user. Several configurable systems exploit this constant propagation of filter coefficients to significantly reduce system resources [52, 53, 54]. One such dedicated filter has been shown to fit in half the space of its more general purpose counterpart [55] The advantages of constant propagation are available only when sufficient hardware resources are available to implement each tap of the filter in parallel. If insufficient resources ....

G. R. Goslin. Using Xilinx FPGAs to design custom digital signal processing devices. In 1995 Proceedings of DSPX, pages 565--604, January 1995. 212

....minimization techniques can be used to further reduce the hardware [2] Several CCM applications have used this technique to reduce hardware and improve circuit speed. Digital filters designed within FPGAs propagate filter coefficients into multipliers to free hardware for additional functionality [3, 4, 5]. One such dedicated IIR filter has been shown to fit in half the space of its general purpose counterpart [6] Other application areas demonstrating this technique on FPGAs include neural networks [7, 8] and text searching [1, 9, 10] 1.2 Run Time Constant Propagation If an operator within a ....

G. R. Goslin. Using Xilinx FPGAs to design custom digital signal processing devices. In 1995 Proceedings of DSPX, pages 565--604, January 1995.

No context found.

Goslin, G. R. "Using Xilinx FPGAs to Design Custom Digital Signal Processing Devices", Proceedings of the DSP 1995 Technical Proceeding pp.595-604,12 Jan 1995.

No context found.

Goslin, G. R. "Using Xilinx FPGAs to Design Custom Digital Signal Processing Devices, " Proceedings of the 1995 DSP Technical Program, pp. 595-604.

No context found.

Goslin, G. R. "Using Xilinx FPGAs to Design Custom Digital Signal Processing Devices", Proceedings of the DSP 1995 Technical Proceeding pp.595-604,12 Jan 1995.

No context found.

G. R. Goslin, "Using Xilinx FPGAs to design custom Digital Signal Processing Devices", Proc. of the DSPX 1995.

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