F. T. Chong, B-H. Lim, R. Bianchini, J. Kubiatowicz, and A. Agarwal. Application performance on the MIT Alewife machine. IEEE Computer, Vol. 29, No. 12, December 1996, pp. 57--64. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Exploiting Fine-Grain Thread Level Parallelism on.. - Keckler, Dally.. (1998) (14 citations) (Correct)
....containing sequences of parallel inner loops. Only the inner loops are parallelized as no outer loop parallelism is available. Ten time steps are simulated and the size of the input vector is varied from 10 to 100 double precision floating point numbers. Benchmark Source Problem Size FFT Alewife [3] 4 128 complex doubles EM3D UC Berkeley [4] 6 30 node pairs MG Alewife [3] 64 2744 doubles CG Yeung [18] 27 1728 doubles EAR Spec92 [15] 10 100 doubles Table 7: Benchmark Summary. 4.2 Inner loop Parallelism In each of the benchmarks, inner loop parallelism is exploited by manually ....
....as no outer loop parallelism is available. Ten time steps are simulated and the size of the input vector is varied from 10 to 100 double precision floating point numbers. Benchmark Source Problem Size FFT Alewife [3] 4 128 complex doubles EM3D UC Berkeley [4] 6 30 node pairs MG Alewife [3] 64 2744 doubles CG Yeung [18] 27 1728 doubles EAR Spec92 [15] 10 100 doubles Table 7: Benchmark Summary. 4.2 Inner loop Parallelism In each of the benchmarks, inner loop parallelism is exploited by manually identifying independent expressions, function calls, and loop iterations inside an ....
CHONG, F. T, LIM, B.-H., BIANCHINI, R., KUBIATOWICZ, J., AND AGARWAL, A. Application performance on the MIT alewife machine. IEEE Computer 29, 12 (December 1996), 57-64.
An Integer Linear Programming Approach for Optimizing.. - Kandemir Banerjee.. (1999) (3 citations) (Correct)
....both the first level cache (L1) and second level cache (L2) misses in a single formulation, as node costs) we use a metric called weighted cache misses which can be defined as i L1 misses. L2 misses This metric is adapted from the concept of the weighted cachehit ratio used by Chong et al. [3]. Here is a system dependent parameter and gives the relative access latency of the L2 cache with respect to the L1 cache. As an example, suppose that we have a two level cache hierarchy, each cache having a different topology. Assume that for a reference to an array O we want to estimate Cost(Vc ....
F.T. Chong, B-H. Lim, R. Bianchini, J. Kubiatowicz, and A. Agarwal. Application performance on the MIT Alewife machine. IEEE Computer, Vol. 29, No. 12, December 1996, pp. 5764.
Performance Metrics for Embedded Parallel Pipelines - Fleury, Downton, Clark (Correct)
....of NUMA though in point of fact the performance literature, e.g. 46 ] has treated data farms as a separate class. ffl The traditional NUMA performance models were tested on numerical analysis algorithms and not on vision applications. Though recent experiments employ a variety of benchmarks [ 47 ] Vision applications may involve irregular algorithms, without significant loops. Image processing applications tackled in PPF may involve high bandwidths. However, communication latency can often be masked by local buffering of data, which will work even when latency masking through parallel ....
F. T. Chong, B-H. Lim, R. Bianchini, J. Kubiatowicz, and A. Agarwal. Application performance on the MIT alewife machine. IEEE Computer, 29(12):57--64, 1996.
An ILP Approach for Optimizing Cache Locality - Kandemir, Banerjee.. (1998) (Correct)
.... the first level cache (L1) and second level cache (L2) misses in a single formulation, as node costs) we use a metric called weighted cache misses which can be defined as L2 misses 1 ffi L1 misses: This metric is adapted from the concept of the weighted cache hit ratio used by Chong et al. [7]. Here ffi is a system dependent parameter and gives the relative access latency of the L2 cache with respect to the L1 cache. In the SGI Origin 2000 that we use ffi is approximately 11. In other words, using Sarkar et al. s [47] formulation we first estimate the L1 misses and then estimate the L2 ....
F. T. Chong, B-H. Lim, R. Bianchini, J. Kubiatowicz, and A. Agarwal. Application performance on the MIT Alewife machine. IEEE Computer, Vol. 29, No. 12, December 1996, pp. 57--64.
An Integer Linear Programming Approach for Optimizing.. - Kandemir Banerjee.. (1999) (3 citations) (Correct)
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F. T. Chong, B-H. Lim, R. Bianchini, J. Kubiatowicz, and A. Agarwal. Application performance on the MIT Alewife machine. IEEE Computer, Vol. 29, No. 12, December 1996, pp. 57--64.
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