P. Sanders, "Emulating MIMD behavior on SIMD machines," International Conference on Massively Parallel Processing Applications and Development, pp. 313-321, Delft, 1994.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....Consequently, an MIMD emulator is the by product of a loosely coupled client server simulation of a highly structured pipeline processor. This computational theory tells us nothing about how to find an appropriate (U ,1 [ pair, or how efficient the resulting MIMD emulation might be. Sanders [8] has proposed an efficient algorithm to emulate MIMD computations on a synchronous SIMD system. Our Pipeline Processor I MIMD SIMD Fig. 1: System layers of abstraction The standard client server model of a single processing stage. asynchronous system should admit emulation algorithms that are ....

....SIMD system. Our Pipeline Processor I MIMD SIMD Fig. 1: System layers of abstraction The standard client server model of a single processing stage. asynchronous system should admit emulation algorithms that are even more efficient because it completely avoids what Sanders calls SIMD overhead [8] (where the globally issued instruction is not required locally) Our system is still susceptible to load imbalance overhead but this problemdependent issue is inherent to all parallel computing, including MIMD parallelism. Figure 1 shows an abstract model of the system. The user sees a pipeline ....

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P. Sanders, "Emulating MIMD behavior on SIMD machines," International Conference on Massively Parallel Processing Applications and Development, pp. 313-321, Delft, 1994.

....Issue (VII) is an optimization for reducing the effective interpreter cycle time. Instead of issuing all the instructions in the interpreted set every cycle, VII explores the benefits of issuing of a variable set of the instructions [ Abu Ghazaleh et al. 1997, Collins, 1988, Fan et al. 1995, Sanders, 1994 ] By issuing frequent and inexpensive instructions more often than infrequent and costly instructions, the effective length of the CCA is reduced. Delaying the issue of a particular expensive or rare instruction results in two positive effects: i) the cycle time for the iterations where this ....

....all instructions. With the ultra low granularity of operations (a small number of clock cycles for every execution region) the single fetch model is more efficient than the multiple fetch model. Variable instruction issue is necessary to support expensive operations [ Abu Ghazaleh et al. 1997, Sanders, 1994 ] However, variable instruction issue adds many complications at the microcode level. For example, managing the activity status and issuing micro operations concurrently become more complicated. Recall that for a non sparse compositional instruction set, variable instruction issue is not useful ....

P. Sanders. Emulating MIMD behavior on SIMD machines. In International Conference Massively Parallel Processing Applications and Development. Elsevier, 1994.

....avoiding clashes between different modules. Messages are active in the sense that a handler routine is called upon reception. In addition, there are extensions which offer higher level services. Currently there is a sub 1 Even SIMD machines can relatively efficiently emulate MIMD behavior [20]. But automatically compiling an entire library written for MIMD architectures for efficient SIMD execution is currently unrealistic. 2 Asynchronous in the sense that the sender does not need to block until the receiving process has accepted the message. layer for collective communications ....

P. Sanders. Emulating MIMD behavior on SIMD machines. In International Conference Massively Parallel Processing Applications and Development, Delft, 1994. Elsevier.

....of the tree. Additional complications could be introduced by heuristics, or by loops inside the application specific functions isLeaf, firstSuccessor, etc. This paper presents techniques for removing the offending loops and producing an equivalent, more efficient program. It is a generalization of [10] which focuses on a probabilistic model of SIMD emulation for which closed form solutions can be derived. Here we show that even a special case of the more accurate deterministic emulation models leads to NP hard optimization problems. We also give a more complete treatment of heuristic techniques ....

....compute the impact of the next test on this vector. By keeping track of the cost of tests and the fraction of PEs which do productive tests and by iterating a few times through the test loop, a cost function expressing the average cost per productive test can be approximated. For details refer to [10]. This is equivalent to modeling asynchronous control flow and a specific test loop by a Markov chain: A state s ik represents a situation where o i is the operation needed next and k is the current position in the test loop. Using this approach, the cost function can be computed by solving a ....

P. Sanders. Emulating MIMD behavior on SIMD machines. In International Conference Massively Parallel Processing Applications and Development, Delft, 1994. Elsevier.

....complications could be introduced by heuristics, or by loops inside the application specific functions isLeaf, firstSuccessor, etc. This paper presents techniques for removing the offending loops and producing an equivalent, more efficient program. It is an extended version of the conference paper [13]. Section 2 presents the basic techniques and a number of ideas for optimization. Then Section 3 models control flow of programs using Markov chains. The results make it possible to find optimizations with less trial and error. In Section 4 these techniques are applied to a heuristic search ....

P. Sanders, Emulating MIMD behavior on SIMD machines, Proc. International Conference Massively Parallel Processing Applications and Development (Elsevier) , Delft, Netherlands (1994) (to appear).

....most two tests. Additionally, we are free to choose any sequence of tests and we can test cheap or important operations more frequently. It turns out that carefully scheduling the test loop makes it possible to considerably reduce SIMD overhead. For a general discussion of this technique refer to [18]. Additional implementation details are reported in section 3.5 after we have introduced the remaining operations used for load balancing and other purposes. 3 The Parallel Algorithm The basis of our approach to parallelize game tree search is that every PE runs a sequential fffi algorithm. ....

P. Sanders. Emulating MIMD behavior on SIMD machines. In International Conference Massively Parallel Processing Applications and Development. Elsevier, 1994.

....no comparable implementations on a MasPar are known to the author. Another key issue is how a SIMD computer can effectively support the traversal of independent subtrees in the context of complex control structures. This question, which is orthogonal to the topics discussed here is covered in [6, 9]. 4.1 Load Balancing A sequential search algorithm starts with one single root node. In order to assign work to all PEs, the search tree has to be expanded to a sufficient degree and the generated nodes should be evenly spread over all PEs. Interestingly, this is possible using only one single ....

P. Sanders. Emulating MIMD behavior on SIMD machines. Int. Conf. on Massively Parallel Processing, Delft, Elsevier 1994 (to appear).

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