S. Thakur and D. Wong, "On designing ULM-based FPGA logic modules, " in Proc. ACM 3rd Int. Symp. FPGA, Feb. 1995, pp. 3--9.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....utilization of silicon area. In contrast, some FPGAs use MUX based logic blocks or product term based logic blocks. These blocks, although having more than input ports, cannot guarantee an implementation for an arbitrary input function. New universal logic module (ULM) based FPGA logic blocks [34] had been proposed for better covering of input functions, but the coverage was still incomplete (99 of four input functions using an eight input ULM) Since LUT is widely used in today s major FPGAs and is a true ULM for functions of its input size, we focus on implementing functions using ....

S. Thakur and D. Wong, "On designing ULM-based FPGA logic modules, " in Proc. ACM 3rd Int. Symp. FPGA, Feb. 1995, pp. 3--9.

....of a fixed number of variables assuming that permutations and negations of variables are provided outside these blocks. Old research on ULMs and new work on FPGAs have not been related until recently, when studies started appearing about the usefulness of ULM circuits as logic blocks in FPGAs [8] [13]. In this paper, we propose a new type of ULMs for use in FPGAs. Practical designs for 3 and 4 input LUT (LUT.3 and LUT.4) replacements are presented together with the methodology to systematically derive such blocks. Universal Logic Modules are defined as blocks with m general purpose inputs ....

....number of inputs m needed is on the order of 2 n =log(n) A number of practical methods have been proposed for constructing such ULMs. Recent research on ULMs has been focused on investigating the tradeoff between the functionality of logic blocks and their usefulness in real applications. In [13] it is shown that cells with up to 8 inputs can be used to compete with the Actel family of commercial FPGA circuits. The goal of that research, and the work presented in [8] is to find a subset of functions that a ULM can realize so that it behaves as close as possible to the LUT. These papers ....

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S. Thakur and D. F. Wong, "On Designing ULM-Based FPGA Logic Modules", Proceedings of the Third International Symposium on FPGAs, Monterey Bay, California, February 1995, pp. 3-9.

....n 6. 1 1 Introduction Designing a logic module that can implement many different functions is a good idea only if one can come up with a mapping algorithm that can utilize the functionality. Recently, high functionality logic modules based on universal logic modules (ULMs) have been reported [1, 2, 3, 6, 4], but current technology mappers cannot exploit all the functionality offerred. Typically, the best mapping algorithm for logic modules are discovered after the architecture design has been done. Exploration of logic module architectures revolves around established designs with incremental ....

S. Thakur and D.F. Wong. On designing ULM-based FPGA logic modules. Proceedings of SCM/SIGDA FPGA-95, pages 3--9, 1995.

....FPGA model. b) A switch module. switch connection module logic module logic module routing tracks Figure 2: Connection module flexibility (FC = 2) Architectural studies for the symmetric array FPGA have been reported in much of the literature. Logicmodule architectures were studied by [14, 17, 20] and connection module ones by [10, 16] Researchers have shown that the feasibility of FPGA design is constrained more by routing resources than by logic resources [2, 22] Thus it is of importance to facilitate routing in the FPGA design. Switch modules are a crucial component for FPGA routing ....

S. Thakur and D. F. Wong, "On designing ULM-based FPGA logic modules," in Proc. ACM/SIGDA Intl. Symp. Field Programmable Gate Arrays, pp. 3--9, Monterey, CA, Feburary, 1995.

....we developed an algorithm to generate alternative universal SP functions. In particular, we have found all the universal SP functions for n input SP functions, when n 6. 1 Introduction Recently, high functionality logic modules based on universal logic modules (ULMs) have been reported [1, 2, 3, 6, 4], but current technology mappers cannot exploit all the functionality offerred. Typically, the best mapping algorithm for logic modules are discovered after the architecture design has been done. In FPGA 96, Thakur and Wong [5] took a dual approach; they began with a known mapping algorithm and ....

S. Thakur and D.F. Wong. On designing ULM-based FPGA logic modules. Proceedings of SCM/SIGDA FPGA-95, pages 3--9, 1995.

....mapping. It is a good idea to design a logic module that can implement many different functions, subject to the condition that we have a mapping algorithm that can utilize the functionality. Recently, high functionality logic modules based on universal logic modules (ULMs) have been reported [1, 2, 3, 8, 4], but current technology mappers cannot exploit all the functionality offerred. Typically, the best mapping algorithm for logic modules are discovered after the architectural design has been done. Exploration of logic module architectures revolves around established designs with incremental ....

S. Thakur and D.F. Wong. On designing ULM-based FPGA logic modules. Proceedings of ACM International Symposium on Field-Programmable Gate Arrays, pages 3--9, 1995.

.... on CPLD FPGA Density and Performance In addition to the study on the effect of a fixed input LUT, other researchers have also investigated other logic module architectures, including PLA based logic modules [18] heterogeneous modules [15] hybrid modules [16] and universal logic modules [19, 31]. Kouloheris and El Gammal explored the trade off between the area of a PLA based CPLD FPGA and its module granularity [18] They observed that a PLA based architecture achieves the best area efficiency when a module with 8 10 inputs, 3 4 outputs, and 12 13 product terms, and the areas for the ....

.... n input functions F (x 1 ; x n ) The general approach is to specify the set of functions that can be covered by U by assigning y i to 0, 1, x j , or x j , permuting or complementing some inputs, or negating the output of U [10, 23] Lin, MarekSadowska, and Gatlin [19] and Thakur and Wong [31] independently extended the above idea to the logic module design for CPLD FPGAs. While the techniques used in [19] are computationally intensive, the work by [31] gives a more efficient algebraic approach which is suited to larger designs. 7.2 Routing Resources CPLD FPGA routing resources ....

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S. Thakur and D. F. Wong, On designing ULM-based FPGA logic modules, Proc. ACM Int. Symp. Field Programmable Gate Arrays, pp. 3--9, Monterey, CA, Feb. 1995.

....using a library of SP functions. SP functions have the added advantage of having simple and compact CMOS implementations. Hence we shall aim at designing logic modules that are SP. There has been recent work on designing FPGA logic modules based on the concept of universal logic modules (ULMs) [11, 18]. A function is said to a ULM for m input functions if it can implement all m input functions [14, 15, 16] In particular, Lin et al. 11] give a BDD based computational procedure to derive ULMs. In contrast, the procedure given by Thakur et al. 18] was algebraic, and worked for arbitrary ....

....of universal logic modules (ULMs) 11, 18] A function is said to a ULM for m input functions if it can implement all m input functions [14, 15, 16] In particular, Lin et al. 11] give a BDD based computational procedure to derive ULMs. In contrast, the procedure given by Thakur et al. [18] was algebraic, and worked for arbitrary values of m. Both methods used a synthesis strategy based on existing mappers for lookup tables. Targeting only the SP functions reduces the functionality, and hence the complexity, of the logic module. Table 1 compares the total number of non equivalent ....

S. Thakur and D.F. Wong. On designing ULM-based FPGA logic modules. In Int'l Symp. on FPGAs, pages 3--9. ACM SIGDA, 1995.

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