W.D. Schwaderer, "XTP in VLSI - Protocol Decomposition for ASIC Implementation", IEEE Proceedings 15th Conference on Local Computer Networks, Oct. 1990 Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Design and Implementation of Flexible User Protocol Interface - Metzler, Miloucheva (1994) (2 citations) (Correct)
....interface. The network interface can be very flexible and may support a wide range of protocols typical in software like the UltraNet interface supporting ISO TP4 and TCP [Bea 90] or it can be designed in hardware for one specific protocol like the XTP VLSI Protocol Engine hardware concept [Sch 90] Parallel protocol processing Parallel techniques for protocol implementation are often based on special hardware concepts or on formal specifications. BZ 92] focuses on parallel XTP transport system design. BG 93] investigates the use of shared memory multiprocessors for parallel protocol ....
....integrated with copying to the adapter, it is not possible to insert it in the packet header if the buffer on the adapter is organized as FIFO. Integrating the checksum with the copying is always possible when the checksum is placed in the trailer of the sent data like in XTP VLSI implementation[Sch 90] The checksum can be included in the header when the result of the copy operation is an intermediate buffer. Selection of error and flow control functions Here the focus is the flexible selection of error and flow control functions to meet efficient the requirements of the specific media ....
W.D. Schwaderer, "XTP in VLSI - Protocol Decomposition for ASIC Implementation", IEEE Proceedings 15th Conference on Local Computer Networks, Oct. 1990
Goodness Definition And Goodness Measure For High Speed.. - Sebuktekin (1992) (Correct)
....used in opening, closing, and checking the virtual connection over which data is transmitted. 1.3. 7 Express Transfer Protocol Express Transfer Protocol (XTP) is a recent transport protocol being designed for implementation in a specialized VLSI architecture called the Protocol Engine (PE) 102] [112]. XTP was designed in the late eighties as a high performance protocol to provide the necessary services for distributed systems such as remote procedure calls, rapid request response operations, multicasts, concurrent multiple processes, and transaction based file access in addition to performing ....
.... VLSI and hardware not only at the switching level, but also at the protocol levels [142] 143] Recent research includes design of protocol engines or specialized VLSI architectures to perform protocol operations at very high speeds matching the speed of the fiber transmission media [102] [112]. Also, there have been studies on design of programmable protocol engines operating at high speeds to be used by various protocol and networking applications [113] In order to provide ease for hardware support in protocol implementations, it is important to design protocols as lightweight as ....
. W. D. Schwaderer. "XTP in VLSI: Protocol Decomposition for ASIC Implementation ". Proceedings of the 15th Conference on Local Computer Networks (October 1990), 249-252.
A Survey of Parallelism in Communication Subsystems - Heddes, Rütsche (1994) (2 citations) (Correct)
.... Stack [R tsche93a] TCP IP, and ST II 2 Transputers plus VLSI (Analysis) Layer [Woodside93] OSI Transport and Session VME 68020 Multiprocessor Entity [Balraj92] Prompt Dedicated VLSI Entity [Blair93] OSI TP (95) Multi Transputer Entity [Braun92a] XTP, VMTP Multiple Transputer Entity [Chesson87] Schwaderer90] XTP Multiprocessor VLSI Entity [Diot91] TP4 Multiple Transputers VLSI Entity [Jain90] TP4 Analysis Entity [Kaiserswerth91] ISO 8802.2 2 (LLC 2) 4 Transputers with shared memory Entity [Kanakia88] VMTP Single processor and hardware Entity [Laouar92] ISO 8802.2 2 (LLC 2) 5 Transputers ....
.... Projects 9 Project Stack Layer Entity Function Operation VLSI Protocol [Ito93] F CS OSI Layer 2 6 [Maly92] F TCP IP [R tsche93a] M M T CS,HP TCP IP, ST II (Analysis) Woodside93] T F OSI TP0 2 and Session [Balraj92] F M Yes Prompt [Blair93] T M OSI TP4 [Braun92a] M M XTP, VMTP [Chesson87] Schwaderer90] M M CS,HP B XTP [Chesson87] Schwaderer90] M M CS,HP B XTP [Diot91] M Yes TP4 [Jain90] F,T TP4 (Analysis) Kaiserswerth91] T,F M ISO 8802.2 2 [Kanakia88] VMTP [Laouar92] T M ISO 8802.2 2 [La Porta92] S,M MultiStream (Analysis) Maclean91] T M CS TCP IP [Netravali90] M,F custom [R tsche92] T ....
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Schwaderer, W.D., "XTP in VLSI Protocol Decomposition for ASIC Implementation ", Proc. 15tg Conf. on Local Computer Networks, Minneapolis 1990.
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