A. Aggarwal, A. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. of the 28th IEEE Symp. on Foundations of Computer Science, pages 204--216, 1987.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....assuming a at memory with uniform access times. Many computational models attempt to capture the e ects of the memory hierarchy on the running times of algorithms. There is a tradeo between the accuracy of the model and its ease of use. One body of work explores multilevel memory hierarchies [AACS87, ACS87, ACFS94, ABZ96, ABZ02, RW94, Sav95, Vit01, VS94b] though the proliferation of parameters in these models makes them cumbersome for algorithm design. A second body of work concentrates on two level memory hierarchies, either main memory and disk [AV88, BV99, HK81, Vit01, VS94a] or cache ....

....a at memory with uniform access times. Many computational models attempt to capture the e ects of the memory hierarchy on the running times of algorithms. There is a tradeo between the accuracy of the model and its ease of use. One body of work explores multilevel memory hierarchies [AACS87, ACS87, ACFS94, ABZ96, ABZ02, RW94, Sav95, Vit01, VS94b] though the proliferation of parameters in these models makes them cumbersome for algorithm design. A second body of work concentrates on two level memory hierarchies, either main memory and disk [AV88, BV99, HK81, Vit01, VS94a] or cache and main ....

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Alok Aggarwal, Ashok K. Chandra, and Marc Snir. Hierarchical memory with block transfer. pages 204-216, Los Angeles, CA, October 1987.

....Traditionally most algorithmic work has been done in the Random Access Model (RAM) of computation, which assumes a at memory with uniform access times. Recently, however, research has been performed on developing theoretical models for modern complicated hierarchical memory systems; see e.g. [2, 3, 4, 6, 36, 43, 44]. In order to avoid the complications of multilevel memorymodels, a body of work has focused on two level memory hierarchies. In the most successful two level model, the Disk Access Model (DAM) of Aggarwal and Vitter [5] the memory hierarchy consists of an internal memory of size M and an ....

A. Aggarwal, A. K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. IEEE Symp. on Foundations of Computer Science, pages 204-216, 1987.

....was proposed. The control is identical to that of the RAM, but access to location x requires f(x) instead of constant time. In the HMM, however, there is no concept of block transfer to utilize spatial locality in algorithms. The Hierarchical Memory Model with Block Transfer (HMBT) proposed in [2], is defined as the HMM, but in addition a block copy operation BC(x; y; l) is present. It copies the locations x i to y i for 0 i l and is valid only if the intervals [x; x l] and [y; y l] are disjoint. A block copy operation is assumed to take max(f(x) f(y) l time. In the HMM and ....

....of such algorithms include merging, searching a random sequence and computing the dot product of two vectors. Theorem 2. Any algorithm that touches n inputs on the P HMBT with access cost function f(x) blog(x)c (n) time. Proof. We prove the theorem by using the same technique as in [2]. Let b i (t) be the least k such that a i has been stored in memory location k during one of the first t steps of the computation. Define the potential at step t as OE(t) b i (t) The initial potential is OE(0) i) When the algorithm terminates after T steps, each input has been ....

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A. Aggarwal, A.K. Chandra, and M. Snir. Hierarchical Memory with Block Transfer. In 28-th Symposium on Foundations of Computer Science, pages 204--216, October 1987.

....in one step. They obtained tight bounds for matrix multiplication, FFT, sorting, and other problems. The hierarchical memory model (HMM) by Aggarwal et al. 4] treats memory as a linear array, where the cost of an access to element at location x is given by a cost function f#x#. The BT model [5] extends HMM to support block transfers. The UMH model by Alpern et al. 11] is a multilevel model that allows I O at different levels to proceed in parallel. Vitter and Shriver introduce parallelism, and they give algorithms for matrix multiplication, FFT, sorting, and other problems in both a ....

A. AGGARWAL,A.K.CHANDRA, AND M. SNIR, Hierarchical memory with block transfer, in 28th Annual Symposium on Foundations of Computer Science, Los Angeles, California, 12--14 Oct. 1987, IEEE, pp. 204--216.

....are even more significant, however, because the paradigms described in this paper continue to work even when parallelism is added and D and P increase. Furthermore, they can be made to work optimally on hierarchical models having more than two levels; these include the well known HMM [1] BT [2], and UMH [4] pictured in Figure 3) and their parallelizations [27,37] pictured in Figure 4) Details of the algorithms for these models are discussed in the full version of this paper. To a large extent they are based on modified versions of two of the main paradigms discussed above, namely ....

A. Aggarwal, A. Chandra & M. Snir, ;'Hierarchi- cal Memory with Block Transfer," Proc. 28tt IEEE FOCS, Los Angeles, CA (1987).

....Parallel multilevel memory hierarchies. The H hierarchies (of any of the types listed in Figure 3) are connected at the base level by an H processor CRCW PRAM with H global memory locations. grow much slower or not at all. An elaboration of HMM is the Block Transfer (BT) model of Aggarwal el al. [ACSa], depicted schematically in Figure 3b. Like HMM, it has a cost function f(z ) but additionally it simulates the effect of block transfer by allowing the d 1 locations z , z to be accessed for cost f(z ) d . So in the figure, the main cost is incurred in injecting the ; needle ; pushing ....

....in Algorithm 1, we need to add another line right after step (6) to reposition all the buckets into consecutive locations on each virtual memory hierarchy. This repositioning is done on a virtual hierarchy byvirtual hierarchy basis, using the generalized matrix transposition algorithm given in [ACSa]. We concentrate in this section on the cost function f(x) x , where 0 c 1. Deterministic algorithms for f(x) x with c 1 have been reported previously [ViSa] The upper bound for fix) log z can be no larger than that for fix) since log z x for all z 0; since the lower bounds ....

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A. Aggarwal, A. Chandra, and M. Shit, "Hierarchical Memory with Block Transfer," Proceedings of 2$th Annual IEEE S!tmposium on Foundations of Computcr Science (October 1987), 204 216.

....follow any speci ed pattern. Attention has been also devoted [16, 19] to eciently storing particular data structures in secondary memory in a dynamic environment, that is, when the underlying data structure is updated dynamically. Other related problems have been considered by Aggarwal et al. [1, 2, 3]. These works introduced di erent models of hierarchical memories and analyzed the behavior of algorithms for di erent problems in those models. Our problem is di erent from the cited works in the sense that we do not have to minimize the number of accesses to secondary memory necessary to solve a ....

A. Aggarwal, A.K. Chandra and M. Snir, Hierarchical memory with block transfer, Proc. 28th. Annual Symposium on Foundations of Computer Science 204-216 (1987).

....Most algorithmic work has been done in the Random Access Machine (RAM) model of computation, which models a at memory with uniform access time. Recently however, some attention has turned to the development of theoretical models for modern complicated hierarchical memory systems see e.g. [2, 3, 4, 6, 33, 37, 38]. Developing models that are both simple and realistic is a challenging task since a memory hierarchy is described by many parameters. In order to avoid the complications of multilevel memory models, a body of work has focused on two level memory hierarchies. Most of this work has been done in the ....

A. Aggarwal, A. K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. IEEE Symp. on Foundations of Comp. Sci., pages 204-216, 1987.

....each record in the nth layer takes n time units to access. We consider all well behaved cost functions f(x) by which we mean that f(2x) c f(x) for all x. Typical examples are f(x) log x and f(x) x , for ff 0. An elaboration of HMM is the Block Transfer (BT) model of Aggarwal et al. [ACSa], depicted schematically in Figure 2b. Like HMM, it has a cost function f(x) to access a single record, but in addition it incorporates the notion of block transfer by allowing access to the previous records in unit time per record; that is, the 1 locations x; x Gamma 1; x Gamma ....

....in Algorithm 1 we need to add another step right after Step (6) to reposition all the buckets into consecutive locations on each logical memory hierarchy. This repositioning is done on a logical hierarchy by logical hierarchy basis, using the generalized matrix transposition algorithm given in [ACSa]. We concentrate in this section on the cost function f(x) x , where 0 ff 1. We choose 1 Gammaff (Note that the quantities defined above may be non integral. The actual values of G and S are the truncated values of these quantities. But as ....

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Alok Aggarwal, Ashok K. Chandra & Marc Snir, "Hierarchical Memory with Block Transfer, " Proceedings of 28th Annual IEEE Symposium on Foundations of Computer Science, Los Angeles, CA (October 1987). 28

....algorithms and related data structures. Some early cache analysis [4] assumed a memory structure where access to a certain element took logarithmic time. While a good step forward in the techniques of cache analysis, there is no notion of block structure of cache. Later work took this into account [5] but uses a model that relies on much control over block transfer between memory levels a model that does not accurately portray most systems in use today. Moret and Shapiro [1] evaluated Kruskal s and Prim s algorithms in a real environment, but did not focus on specific cache effects in their ....

Alok Aggarwal, Bowen Alpern, Ashok K. Chandra and Marc Snir. Hierarchical Memory with Block Transfer. In 28 IEEE Symposium on the Foundations of Computer Science, 204-216, 1987.

....incur any work loss due to the restrictive nature of the loop memories. 1.5 Related Work Several models for virtual memory have been considered recently. RAM was proposed as a simple model of sequential computation without any virtual memory in Aho, Hopcroft, Ullman [AHU74] Aggarwal et al. AACS87] and [ACS87] introduced the first hierarchical memory model which also incorporates block transfer. They [ACS89] extended it to the parallel computation model PRAM. Vitter and Shriver [VS90] consider the PRAM case where parallel block transfers are permitted. In all these models, the algorithm ....

....work loss due to the restrictive nature of the loop memories. 1.5 Related Work Several models for virtual memory have been considered recently. RAM was proposed as a simple model of sequential computation without any virtual memory in Aho, Hopcroft, Ullman [AHU74] Aggarwal et al. AACS87] and [ACS87] introduced the first hierarchical memory model which also incorporates block transfer. They [ACS89] extended it to the parallel computation model PRAM. Vitter and Shriver [VS90] consider the PRAM case where parallel block transfers are permitted. In all these models, the algorithm optimization ....

[Article contains additional citation context not shown here]

A. Aggarwal, A. Chandra, and M. Snir. Hierarchical Memory with Block Transfer. In Proceedings of IEEE Symposium on Foundations of Computer Science, pages 204--216. IEEE, 1987.

....manner in which the arrays are accessed. Conflict misses pose an additional challenge in designing efficient algorithms in the cache. This class of misses is not present in the I O models, where the mapping between internal and external memory is fully associative. Existing memory hierarchy models [4, 2, 3, 5] do not model certain salient features of caches, notably the lack of full associativity in address mapping and the lack of explicit control over data movement and replacement. Unfortunately, these small differences are malign in the effect. 1 The conflict misses that they introduce make ....

....levels of memory hierarchy. Aggarwal et al. 2] defined the Hierarchical Memory Model (HMM) that assigns a function f#x# to accessing location x in the memory, where f is a monotonically increasing function. This can be regarded as a continuous analog of the multilevel hierarchy. Aggarwal et al. [3] added the capability of block transfer to the HMM, which enabled them to obtain faster algorithms. Alpern et al. 5] described the Uniform Memory Hierarchy (UMH) model, where the access costs differ in discrete steps. Very recently, Frigo et al. 18] presented an alternate strategy of algorithm ....

A. Aggarwal, A. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proceedings of IEEE Foundations of Computer Science, pages 204--216, 1987.

....that these memory transfer times should not be treated as constants because they can vary by many orders of magnitude and are often the dominant feature of running time. There is a tradeoff between the accuracy of a model and its ease of use. One body of work explores multilevel hierarchies [2, 3, 5, 28, 37, 39] and more complicated models of memory [6, 27] A problem with many of these models is that algorithms must take into account many parameters, e.g. the relative speeds and block sizes at each memory level. While this leads to accurate time predictions, it makes it difficult to design and analyze ....

....by the algorithm designer, whereas in the cache oblivious model, memory is managed by the existing caching and paging mechanisms. Also, the HMM model does not model block transfers. The HMM model was extended by Aggarwal, Chandra, and Snir to the BT model to take into account block transfers [3]. In the BT model the algorithm can choose and vary the block size, whereas in the cache oblivious model the block size is fixed and unknown. Results. We develop three cache oblivious search tree data structures. These results demonstrate that even irregular dynamic problems can be solved ....

A. Aggarwal, A. K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. 28th IEEE Sympos. Found. Comp. Sci., pp. 204--216, Los Angeles, Oct. 1987.

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A. Aggarwal, A. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. of the 28th IEEE Symp. on Foundations of Computer Science, pages 204--216, 1987.

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A. Aggarwal, A.K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. 28th Annual IEEE Symposium on Foundations of Computer Science (FOCS 87), pages 204-216, 1987.

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A. Aggarwal, A. K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proceedings of the 28th IEEE Symposium on Foundations of Computer Science, pages 204-216, 1987.

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A. Aggarwal, A. K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. of the 28th Annual IEEE Symp. on Foundations of Computer Science (FOCS), pages 204-216, 1987.

No context found.

A. Aggarwal, A.K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. 28th Annual IEEE Symposium on Foundations of Computer Science (FOCS 87), pages 204--216, 1987.

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A. Aggarwal A.K. Chandra and M. Snir. Hierarchical memory with block transfer. In In 28th Annual Symposium on Foundations of Computer Science, pages 204-- 216, Los Angeles, California, October 1987.

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A. Aggarwal, A.K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. 28th Annual IEEE Symposium on Foundations of Computer Science (FOCS 87), pages 204-216, 1987.

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A. Aggarwal, A. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proceedings of IEEE Foundations of Computer Science, pages 204--216, 1987.

No context found.

A. Aggarwal, A. K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proc. 28th IEEE Sympos. Found. Comp. Sci., pp. 204--216, Los Angeles, Oct. 1987.

No context found.

A. Aggarwal, A. K. Chandra, and M. Snir. Hierarchical memory with block transfer. In Proceedings of the 28th Annual IEEE Symposium on Foundations of Computer Science, pages 204-216, Los Angeles, CA, October 1987.

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A. Aggarwal, K. Chandra, and M. Snir. Hierarchical memory with block transfer. In The 28th Annual IEEE Symposium on Foundations of Computer Science, pages 204-216, LosAngeles, CA, 1987.

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A. Aggarwal, A.K. Chandra and M. Snir, "Hierarchical memory with block transfer". 1987 IEEE.

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