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Hauck, S., "The Roles of FPGAs in Reprogrammable Systems", Proc. IEEE, pp. 615--638, 1998

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A Reconfigurable Approach to TCP/IP Packet Filtering - Sinnappan (2001)   (1 citation)  (Correct)

....gate arrays (FPGAs) are a form of programmable logic device (PLD) PLDs are integrated circuits that can be programmed by an end user to implement various logic circuits. FPGAs di er from other PLDs in that they have a higher logic capacity and can implement multi level logic circuits [25]. Multi level logic circuits are circuits in which the 7 depth of interconnection of the logic gates excluding not gates is more than two. In contrast to FPGAs, most PLDs have a lower capacity or can only implement two level logic circuits. Ever since their introduction in the mid 1980s, FPGAs ....

....digital signal processing, video and image processing, and control and robotics; see [35] for a selection of di erent applications. Such a wide variety of applications is possible, because FPGAs can be used to implement not just standard hardware equations, but general computations as well. Hauck [25] suggests that for computations of the right form, FPGAs are faster than microprocessors executing software, but that a custom hardware implementation will always be faster. Hence, in general, FPGAs provide solutions that are much faster than software, but not as fast as custom hardware. ....

Scott Hauck. The role of FPGAs in reprogrammable systems. Proceedings of the IEEE, 86(4):615-638, April 1998.


3-D Floorplanning: Simulated Annealing and Greedy.. - Bazargan, Kastner, Majid (2000)   (Correct)

.... Furthermore, the ability to partially reconfigure the chip as it is running, enables the implementation of dynamically reconfigurable hardware systems which adapt themselves to the application for better performance [5] 9] 14] Hauck has reported many applications for reconfigurable systems in [7]. Such systems usually consist of a host processor and an FPGA co processor called Reconfigurable Functional Unit (RFU) which can be programmed in the course of the running time of the program with varying configurations at different stages of the program. An example is shown in Figure 1. Figure ....

Hauck, S. 1998. The roles of FPGAs in reprogrammable systems. Proceedings of the IEEE 86(4): 615--638.


Dynamic Hardware Plugins in an FPGA with Partial - Horta, Lockwood, Taylor.. (2002)   (Correct)

....a fee. DAC 2002 June 10 14, 2002, New Orleans, Louisiana, USA Copyright 2002 ACM 1 58113 297 2 01 0006 (1 58113 461 4) 5.00 1. INTRODUCTION FPGAs are frequently used in networking applications, where they o#er both the performance of custom hardware and the flexibility of reprogrammability [1] [2] Systems implemented with FPGAs can make use of their reprogrammability in one of two ways: Compile Time Reconfiguration (CTR) or Run Time Reconfiguration (RTR) 3] CTR systems do not change the FPGA s configuration for the lifetime of the application, e.g. SPLASH [4] and PAM [5] RTR ....

S. Hauck, "The roles of FPGAs in reprogrammable systems," Proceedings of the IEEE, vol. 86, pp. 615--638, Apr. 1998.


Routing Architecture and Layout Synthesis for Multi-FPGA Systems - Khalid (1999)   (4 citations)  (Correct)

.... architecture Field Programmable Gate Arrays (FPGAs) are widely used for implementing digital circuits because they offer moderately high levels of integration and rapid turnaround time [Brow92, Trim94] Multi FPGA Systems (MFSs) which are collections of FPGAs joined by programmable connections [Hauc98a], are used when the logic capacity of a single FPGA is insufficient, and when a quickly reprogrammed system is desired. MFSs are used in logic emulation [Babb97, Apti98, Quic98] rapid prototyping [Van92, Gall94, Alte94, Lewi98] and reconfigurable custom computing machines [Arno92, Cass93, Dray95, ....

S. Hauck, "The Roles of FPGAs in Reprogrammable Systems", Proceedings of the IEEE, vol. 86, no. 4, pp. 615-638, July 1998. 129


Field Programmable Gate Arrays for Radar Front-End Digital Signal .. - Moeller (1999)   (Correct)

....However, this processing is often very regular, is highly parallel, and is usually independent of the data. Therefore, most implementations to date have used either commercially available, dedicated, computing engines or custom very large scale integrated circuit (VLSI) designs. MMT00, Hau98, BAK96] One such custom VLSI design was recently fielded at MIT Lincoln Laboratory that is capable of operating at 100 GOPS. It has the ability to change banks of coefficients in a few milliseconds, and is channel parallel, meaning it can be scaled to many hundreds of GOPS as the number of radar ....

....different applications. A computing device would not need to be as generic as a microprocessor, as reconfigurable elements could form special purpose hardware to solve a specific problem, but 212121 would be flexible enough to change that special purpose function to another function upon demand. Hau98, BAK96] The ability of a system to change its functionality in hardware instead of in just software lead to the development of reconfigurable computing. Hardware was now able to become the medium for general purpose computing, as it could adapt itself to compute algorithms normally handled by a ....

[Article contains additional citation context not shown here]

Scott Hauck. "The roles of FPGAs in reprogrammable systems." Proceedings of the IEEE, 86(4):615--638, April 1998.


An Open Platform for Development of Network Processing Modules.. - Lockwood (2001)   (3 citations)  (Correct)

....performance critical features to a fixed set of features. 1.4 Field Programmable Gate Arrays Field Programmable Gate Arrays can be used to simultaneously address both of these issues. Routers and firewalls that utilize FPGAs can implement a desirable balance between performance and flexibility [1]. They share the performance advantage of ASICs in that customized pipelines can be implemented and that parallel logic functions can be performed over the area of the device 1 Card OC3 OC12 OC48 Line FPX Extender Port programmable Field Card OC3 OC12 OC48 Line Internet ....

S. Hauck, "The roles of FPGAs in reprogrammable systems, " Proceedings of the IEEE, vol. 86, pp. 615--638, Apr. 1998.


Reprogrammable Network Packet Processing on the.. - Lockwood, Naufel.. (2001)   (5 citations)  (Correct)

....of the system. Routers that solely use software to process packets typically archive throughputs that are several orders of magnitude slower than their hardwarebased counterparts. Routers and firewalls that utilize FPGAs can implement a desirable balance between performance and flexibility [1]. They share the performance advantage of ASICs in that customized pipelines can be implemented and that parallel logic functions can be performed over the area of the device They also share the flexibility found in software systems to be reconfigured [2] Figure 1: FPX Module 2. THE FPX SYSTEM ....

S. Hauck, "The roles of FPGAs in reprogrammable systems," Proceedings of the IEEE, vol. 86, pp. 615--638, Apr. 1998.


Evolvable Internet Hardware Platforms - Lockwood (2000)   (1 citation)  (Correct)

....are an exciting technology for evolvable networks. They share the performance advantage of ASICs and custom Silicon because they can implement parallel logic functions in hardware. They share the flexibility of the microprocessors and network processors in that they can be dynamically reconfigured [1]. Field Programmable Gate Arrays have proven to be an effective technology for implementation of networking hardware. In the development of the iPOINT testbed, a complete Asynchronous Transfer Mode (ATM) switch was built using FPGAs [2] Further, a queuing module was implemented that provided ....

S. Hauck, "The roles of FPGAs in reprogrammable systems," Proceedings of the IEEE, vol. 86, pp. 615-- 638, Apr. 1998.


Fast Template Placement for Reconfigurable Computing.. - Bazargan, Kastner.. (2000)   (20 citations)  (Correct)

....the hardware. Furthermore, the ability to reconfigure the chip as it is running enables the implementation of dynamically reconfigurable hardware systems which adapt themselves to the application for better performance [10, 16, 28] Hauck has reported many applications in reconfigurable systems in [12]. Such systems usually consist of a host processor and an FPGA co processor called Reconfigurable Functional Unit (RFU) The RFU can be programmed in the course of the running time of the program with varying configurations in different stages of the program. An example is shown in Figure 1. As ....

S. Hauck. "The Roles of FPGAs in Reprogrammable Systems". Proceedings of the IEEE, 86(4):615--638, April 1998.


Physical Design for Reconfigurable Computing Systems.. - Kastner, Bazargan..   (Correct)

.... Furthermore, the ability to partially reconfigure the chip as it is running, enables the implementation of dynamically reconfigurable hardware systems which adapt themselves to the application for better performance [5, 9, 14] Hauck has reported many applications for reconfigurable systems in [7]. Such systems usually consist of a host processor and an FPGA co processor called Reconfigurable Functional Unit (RFU) which can be programmed in the course of the running time of the program with varying configurations at different stages of the program. An example is shown in Figure 1. Figure ....

S. Hauck. "The Roles of FPGAs in Reprogrammable Systems". Proceedings of the IEEE, 86(4):615--638, April 1998.


3-D Floorplanning: Simulated Annealing and Greedy.. - Bazargan, Kastner..   (Correct)

.... Furthermore, the ability to partially reconfigure the chip as it is running, enables the implementation of dynamically reconfigurable hardware systems which adapt themselves to the application for better performance [5, 9, 14] Hauck has reported many applications for reconfigurable systems in [7]. Such systems usually consist of a host processor and an FPGA co processor called Reconfigurable Functional Unit (RFU) which can be programmed in the course of the running time of the program with varying configurations at different stages of the program. An example is shown in Figure 1. Figure ....

S. Hauck. "The Roles of FPGAs in Reprogrammable Systems ". Proceedings of the IEEE, 86(4):615--638, April 1998.


Abstract: Configuration Relocation and Defragmentation .. - Compton, Cooley.. (2000)   (Correct)

.... Scott Hauck Department of Electrical Engineering University of Washington Seattle, WA USA hauck ee.washington.edu Abstract Custom computing systems exhibit significant speedups over traditional microprocessors by mapping computeintensive sections of a program to reconfigurable logic [Hauck98] However, the high overhead of reconfiguration can limit the execution times achievable with these systems. Research has shown that the ability to relocate and defragment configurations on an FPGA dramatically decreases the overall configuration overhead [Li00] We therefore explore the ....

S. Hauck, "The Roles of FPGAs in Reprogrammable Systems", Proceedings of the IEEE, Vol. 86, No. 4, pp. 615-638, April 1998.


Reconfigurable Computing: A Survey of Systems and Software - Compton, Hauck (2000)   (21 citations)  Self-citation (Hauck)   (Correct)

....of reconfigurable computing. Instead, it hopes to serve as an introduction to this rapidly evolving field, bringing interested readers quickly up to speed on developments from the last half decade. Those interested in further background can find coverage of older techniques and systems elsewhere [Rose93, Smith97, Hauck96, Hauck98d]. 2 Technology Reconfigurable computing as a concept has been in existence for quite some time [Estrin63] Even general purpose processors use some of the same basic ideas, such as reusing computational components for independent computations, and using multiplexers to control the routing ....

....connection scheme between the chips, as well as to external memory and the system bus. This is to provide for circuits that are too large to fit within a single FPGA, but may be partitioned over the multiple FPGAs available. A number of different interconnection schemes have been explored [Butts91, Hauck98c, Hauck98d, Khalid99] including meshes and crossbars, as shown in Figure 10. A mesh connects the nearest neighbors in the array of FPGA chips. This allows for efficient communication between the neighbors, but may require that some signals pass through an FPGA simply to create a connection between non neighbors. ....

[Article contains additional citation context not shown here]

S. Hauck, "The Roles of FPGAs in Reprogrammable Systems" Proceedings of the IEEE, Vol. 86, No. 4, pp. 615-638, April 1998.


A Lemple-Ziv based Configuration Management Architecture for.. - Richmond (2001)   Self-citation (Hauck)   (Correct)

No context found.

S. Hauck, "The Roles of FPGAs in Reprogrammable Systems", Proceedings of the IEEE, Vol. 86, No. 4, pp. 615-639, April 1998


Don't Care Discovery for FPGA Configuration Compression - Li (1999)   (4 citations)  Self-citation (Hauck)   (Correct)

....is the ability to reconfigure during execution. For systems in which reconfiguration was done infrequently, the time to reconfigure the FPGA was of little concern. However, as more and more applications involve run time reconfiguration, fast reconfiguration of FPGAs becomes an important issue [2]. In most systems an FPGA must sit idle while it is being reconfigured, wasting cycles that could otherwise be used to perform useful work. For example, applications on the DISC and DISC II system spend 25 [4] to 71 [5] of their execution time performing reconfiguration. Thus, a reduction in the ....

S. Hauck, "The Roles of FPGAs in Reprogrammable Systems", Proceedings of the IEEE, Vol. 86, No. 4, pp. 615638, April, 1998.


Improved Configuration Prefetch for Single Context.. - Hauck, Li   Self-citation (Hauck)   (Correct)

....applications. In these first generation systems a single configuration is created for the FPGA, and this configuration is the only one loaded into the FPGA. A second generation soon followed, with FPGAs that could use multiple configurations, but reconfiguration was done relatively infrequently [Hauck98]. In such systems the time to reconfigure the FPGA was of little concern. Many of the most exciting applications being developed with FPGAs today involve run time reconfiguration [Hauck98] In such systems the configuration of the FPGAs may change multiple times in the course of a computation, ....

....with FPGAs that could use multiple configurations, but reconfiguration was done relatively infrequently [Hauck98] In such systems the time to reconfigure the FPGA was of little concern. Many of the most exciting applications being developed with FPGAs today involve run time reconfiguration [Hauck98]. In such systems the configuration of the FPGAs may change multiple times in the course of a computation, reusing the silicon resources for several different parts of a computation. Such systems have the potential to make more effective use of the chip resources than even standard ASICs, where ....

S. Hauck, "The Roles of FPGAs in Reprogrammable Systems", Proceedings of the IEEE, Vol. 86, No. 4, pp. 615-638, April, 1998.


Configuration Relocation and Defragmentation for.. - Compton, Cooley.. (2000)   (2 citations)  Self-citation (Hauck)   (Correct)

.... Scott Hauck Department of Electrical Engineering University of Washington Seattle, WA USA hauck ee.washington.edu Abstract Custom computing systems exhibit significant speedups over traditional microprocessors by mapping compute intensive sections of a program to reconfigurable logic [Hauck98] However, the number and frequency of these hardware mapped sections of code are limited by the requirement that the speedups provided must outweigh the considerable cost of configuration. Research has shown that the ability to relocate and defragment configurations on an FPGA ....

....with a negligible area increase over a generic partially reconfigurable FPGA. Introduction One application of FPGAs is that of reconfigurable computing the use of a run time reprogrammable device operating as a customizable coprocessor or functional unit alongside a main microprocessor [Hauck98] This reconfigurable logic is used to emulate custom hardware for the acceleration of one or more compute intensive portions of a program. Unfortunately, the speedups attainable by the use of reconfigurable logic are limited by the large configuration overheads incurred each time a function is ....

S. Hauck, "The Roles of FPGAs in Reprogrammable Systems", Proceedings of the IEEE, Vol. 86, No. 4, pp. 615-638, April 1998.


Configuration Compression for the Xilinx XC6200 FPGA - Hauck, Li (1999)   (5 citations)  Self-citation (Hauck)   (Correct)

....amount of data needed to transfer during reconfiguration. This results in an overall reduction of about a factor of 4 in total bandwidth required for reconfiguration. Configuration Compression FPGAs are often used as powerful custom hardware for applications that require high speed computation [Hauck98b]. One of the major benefits provided by FPGAs is the ability to reconfigure during execution. For past systems in which reconfiguration was done infrequently, the time to reconfigure the FPGA was of little concern. However, as more and more applications involve run time reconfiguration, fast ....

S. Hauck, "The Roles of FPGAs in Reprogrammable Systems", Proceedings of the IEEE, Vol. 86, No. 4, pp. 615-639, April 1998.


Architectures and Tools for Heterogeneous Reconfigurable Systems - Andreas Koch Tech (2002)   (Correct)

No context found.

Hauck, S., "The Roles of FPGAs in Reprogrammable Systems", Proc. IEEE, pp. 615--638, 1998


DesignCon 2003 - System-On-Chip And Asic   (Correct)

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S. Hauck, "The roles of FPGAs in reprogrammable systems", Proc. IEEE 86, 4, 615--638, 1998b.


DesignCon 2003 - System-On-Chip And Asic   (Correct)

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S. Hauck, "The roles of FPGAs in reprogrammable systems", Proc. IEEE 86, 4, 615--638, 1998b.


Evaluation of Various Routing Architectures for Multi-FPGA.. - Sushil Chandra Jain   (Correct)

No context found.

S. Hauck, "The Roles of FPGAs in Reprogrammable Systems, " Proceedings of the IEEE, vol. 86, no. 4, pp. 615--638, Apr 1998.


Automated Tools to Implement and Test Internet Systems.. - Lockwood, Neely.. (2003)   (Correct)

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S. Hauck, "The roles of FPGAs in reprogrammable systems," Proceedings of the IEEE, vol. 86, pp. 615--638, Apr. 1998.


Fast Matching of CBG Patterns using FPGAs - Scott Hazelhurst And (2003)   (Correct)

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S. Hauck. The Roles of FPGAs in Reprogrammable Systems. Proceedings of the IEEE, 86(4):615-- 638, April 1998.


Fast Matching of CBG Patterns with - Applications To Protein (2002)   (Correct)

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S. Hauck. The Roles of FPGAs in Reprogrammable Systems. Proceedings of the IEEE, 86(4):615-- 638, April 1998. 9

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