D. Mosberger, L. Peterson, S. O'Malley, "Protocol latency: MIPS and reality", Technical Report TR 95-02, University of Arizona, Tucson, 1995. Home/Search Document Details and Download
Summary Related Articles Check |
This paper is cited in the following contexts:
Demultiplexed Architectures: A Solution for Efficient.. - Roca, Braun, Diot (1997) (11 citations) (Correct)
....workstations in regard to the communication system efficiency have two origins: the hardware and system environments. The hardware architecture aspect The performance limiting factor is no longer the physical medium nor the processor, but the memory in spite of elaborated cache techniques. [Mosberger95] reports that a fast RISC processor is never busy more than 37 of the time during a TCP IP traffic. Protocol processing is either instruction bandwidth or data bandwidth limited, but never CPU limited. The network adapters are also far from perfection. The use of a DMA requires that an interrupt ....
....sometimes rely on user level communication stacks or on specific networks. A completely different approach to minimize the memory access costs, that does not alter the communication stack architecture, consists in improving the instruction cache hit ratio, either with a compiler oriented technique [Mosberger95, Castelluccia95] or run time linker oriented technique [Montz94] Optimization of the communication system software environment Two optimized communication system frameworks have been designed: x Kernel [Hutchinson91] and an improved BSD derived architecture [Jacobson92, Jacobson93] x Kernel, like STREAMS, ....
D. Mosberger, L. Peterson, S. O'Malley, "Protocol latency: MIPS and reality", Technical Report TR 95-02, University of Arizona, Tucson, 1995.
Integrated Layer Processing Can Be Hazardous to Your.. - Ahlgren, Björkman.. (1996) (5 citations) (Correct)
....enough to fit into cache. For unified caches, some instructions may be thrown out due to conflicts with data, such as table access data, which will prolong the processing time. Function calls in the data manipulation code reduce locality and increase the risk of address conflicts in the cache, see (Mosberger, Peterson and O Malley, 1995) for a discussion on this effect. 2.1 Integrated Layer Processing The basic idea behind ILP is to perform all the manipulations in one or two processing loops, instead of performing several manipulation loops sequentially as is most often done today. With an ILP loop we mean a loop that consists ....
Mosberger, D., Peterson, L.L. and O'Malley, S. (1995) Protocol latency: MIPS and reality.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC