A. Agarwal, L. Sites and M. Horowitz, "ATUM: a new technique for capturing address traces using microcode," Proc. 13th Ann. Int'l Symp. Computer Architecture (ISCA 86), 1986, pp. 119-127.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....previously attempted to directly describe caches in terms of locality. Most cache studies are done via trace driven simulation. Using one method or another, a list of memory requests is recorded as a trace while a given program runs on a computer. Many methods have been proposed over the years [13] [14] 15] 16] One of the more recent and accurate methods is BACH [17] 18] At BYU, we have a large repository of traces collected using the BACH system. The workloads traced include SPEC CINT2000 and SPEC CFP2000 on a variety of operating systems. The traces are freely available to the public ....

A. Agarwal, R. L. Sites, and M. Horowits. ATUM: a new technique for capturing address traces using microcode. In Proceedings of the 13th International Symposium on Computer Architecture, pages 119-127. IEEE, 1986.

....size is doubled. For example, p = 0:3 means that doubling the memory size and line size will reduce the miss rate to 3=10 of its previous value. Note that 0 p 1 and C 1. We used trace driven simulation to empirically estimate the value of p for various programs. We used four ATUM cache traces [1] and two other traces, spice and cc1 as shown in Table 1. Using a cache simulator, we measured the instruction miss rates for different cache and line sizes. The value of p for a 4k cache with an 8 byte line size is denoted by p 4k=8 and is given by p 4k=8 = m 8k=16 m 4k=8 , where m 8k=16 is the ....

Agarwal, A., Sites, R., and Horowitz, M. "ATUM: A New Technique for Capturing Address Traces Using Microcode," Proceedings of the 13th Annual Symposium on Computer Architecture, June 1986, pp. 119-127.

....or sampling among code regions. In contrast, SIGMA provides detailed information about individual memory references, and the actual memory addresses being accessed. Other systems have taken advantage of the flexibility provided by the hardware to add instrumentation of datacentric caches. ATUM [16] uses the ability to change the microcode in some processors to collect memory reference information. The FlashPoint [17] system uses the fact that the Stanford FLASH multiprocessor [18] implements its coherence protocols in sotvare, allowing instrumentation to be added at this level. Buck and ....

A. Agrawal, R. L. Sites, and M. Horowitz, "ATUM: A New Technique for Capturing Address Traces Using Microcode". In Proceedings of the 13th Annual International Symposium on Computer Architecture. June 1986, pp. 119-127.

....to our proxy approach, the JOIE toolkit is dependent on current versions of the class java.lang.ClassLoader. In general, the idea of modifying executables is not a new one, and has appeared in other contexts. We list some approaches here for completeness. Using microcode modification, ATUM [1] and MPTRACE [6] generate data and instruction traces and collect them for performing tracedriven simulations in the process of architecture evaluation. By modifying a fully linked executable, Pixie [29] Epoxie [25] and QPT [13] record the sequence of instructions and data references for ....

Anant Agarwal, Richard Sites, and Mark Horwitz. ATUM: A New Technique for Capturing Address Traces Using Microcode. In Proceedings of the 13th International Symposium on Computer Architecture, 119-127, June 1986.

....Processors tends to use some references more than one time making the ratio of unique references to total references very small. Figure 1, shows the number of the unique references and the number of the repeated references versus the total number of requested references for the Dec0 ATUM trace [1,4,7]. For 32,000 requested references the total number of the unique references is smaller than 2,000. The number of repeated references in the 32,000 requested references is about 1,000. This means that 1,000 references are used only once in the 32,000 requests and the other 1,000 are used for ....

....MFU Cache Flow Graph 7 The Trace Simulation The simulation model uses two direct mapped caches C1 and C2. C1 and C2 have the same size and same latency of 1 cycle. The block size for both caches is 16 bytes. We use the ATUM trace Dec0 from Stanford University (Hennessy and Patterson software) [4,7]. 8 MFU Cache Results The results of a three cache designs are presented. The first design is a direct mapped cache, which has the speed advantage, the second system is a two way set associative with least recently replacement policy (LRU) that has the low miss rate advantage and the third ....

A. Agarwal, R.L. Sites, and M. Horowitz, "ATUM: a new technique for capturing address traces using microcode, " in Proc. 13th Int. Symp. Comput. Architecture, June 1986, pp. 119-129

....bank will keep the new page active by latching the row address and keeping the bank RAS low. If the incoming access maps into the two LRU banks, which have their RAS precharge constraints satisfied, then the precharge access mode is performed. 5 The results We use the Atum traces (dec0 and fora) [4] to simulate the DRAM performance. Our study includes the three different protocols mentioned above. The DRAM chips are chosen to be 4 M bits with 80 ns access times and support fast page mode access [6] The total time for the normal access for the DRAM is 155 ns. We assume that this access ....

A. Agarwal, R.L. Sities, and M. Horwitz, ATUM: A new technique for capturing address traces using microcde, Proc. 13th Intl. Symp. on Computer Architecture , Tokyo, Japan, pp. 119-127, June 1986.

....compared to un intercepted programs. In this article, we evaluate the e ect of an intercepting cache on the performance of the main memory that uses fast page or cache DRAM. The results of this study are produced by using trace driven simulation for the whole memory system (cache and DRAM) [4]. Section 2 describes the memory system architecture. In section 3, we present the fast page cache DRAM scheme, used for the multi bank interleaving. Section 4, describes the results of fast page cache DRAM without intercepting cache. In section 5, we present the results of fast page cache DRAM ....

.... cc1 183,023 178,959 65,291 40,527 24,764 1000,002 757,341 242,661 361,982 429,432 199,455 229,977 name Figure 3: The characteristics of selected traces 4 The Results of Fast Page Cache DRAM without Intercepting Cache In this study we use the ATUM traces available from Stanford University [4]. We select dec0, fora and Mul8 traces as they represent uniprogramming and multiprogramming. The table in gure 3 shows the characteristics of selected traces. 4.1 Bank Mapping The performance of the interleaved memory system depends on the bank mapping. Low order address interleaving has an ....

A. Agarwal, R.L. Sities, and M. Horwitz, ATUM: A new technique for capturing address traces using microcde, Proc. 13th Intl. Symp. on Computer Architecture , Tokyo, Japan, pp. 119-127, June 1986.

....instructions executed. Examples include the MIPS R10000 [12] the Compaq Alpha line [3] the UltraSPARC [11] and the Intel Itanium [5] All of these can provide cache miss information. Other systems have used flexibility provided by the hardware to add data centric cache instrumentation. ATUM [1] uses the ability to change the microcode in some processors to collect memory reference information. The FlashPoint [8] system uses the fact that the Stanford FLASH multiprocessor [6] implements its coherence protocols in software, allowing instrumentation to be added at this level. Mtool [4] ....

A. Agrawal, R. L. Sites, and M. Horowitz, "ATUM: A New Technique for Capturing Address Traces Using Microcode," 13th Annual International Symposium on Computer Architecture. June 1986, pp. 119-127.

....a variety of simulation technologies and other attributes. TABLE 2.1: Summary of contemporary instruction level simulators. Name Purpose Input Rep. Detail MD MP Signals SMC OK Technology Bugs OK Accelerator[5] sim exe us Y N Y Y scc gi Y ATOM [ 69 ] t b C exe u N N Y N aug N ATUM[2] sim atr exe us Y Y = YYemu Y dis mod run[28] sim atr asm u N N N N scc N Dynascope[68] db atr otr hll u N N S Y pdi Y EEL[39] tb C exe u N N Y Y aug Y Executor[17] sim exe u N N Y Y pdi Y FastSim v.1[65] sim exe u N N Y N aug ffw Y FastSim v.2 tb C exeuNNYYddi ffw Y FX32[15] sim exe u N N ....

....strategies to perform these operations more quickly. One of the fastest alternatives is to use hardware or microcode emulation of the target machine. For example, ATUM uses special microcoded versions of load store instructions to perform cache simulation without modifying the target executable [2]. WWT uses existing hardware features (e.g. ECC bit on memory) or special purpose hardware (i.e. the Typhoon 0 hardware [63] to simulate cache coherent shared memory. 16 This approach can execute programs quickly, but building hardware is expensive and time consuming, and existing hardware ....

[Article contains additional citation context not shown here]

Anant Agarwal, Richard L. Sites, and Mark Horowitz, "ATUM: A New Technique for Capturing Address Traces Using Microcode," in the Proceedings of the 13th International Symposium on Computer Architecture, 119-127, June 1986.

....of machine architecture, operating system, and runtime system the execution architecture of a system. A commonly used technique for evaluating alternative execution architectures is trace driven simulation, or TDS [14] Traditionally, address traces have been used to evaluate cache organizations [15, 2, 7, 17, 5], page reference traces have been used to evaluate paging policies [3, 13] and file system call traces have been used to evaluate file system designs [10] Increasingly, TDS has been applied to parallel systems, using traces of parallel programs. Despite questions about the validity and ....

.... While trace driven simulation appears straightforward, the sheer volume of data may make it a daunting undertaking (depending on the level at which the traces are taken and the length of the program execution) Some issues that arise are: 5 System Instrumentation Dilation Name Tool Factor ATUM [2] Microcode 20 TRAPEDS [16] Instrumented executable code 10 30 MPtrace [6] Instrumented executable code 2 3 Titan Trace [4] Compiler, kernel 8 12 AE [9] Compiler 1 4 Table 1: Current trace collection systems. What to trace The trace might contain a record of high level ....

[Article contains additional citation context not shown here]

Agarwal, A., Sites, R. L., and Horowitz, M. ATUM: A new technique for capturing address traces using microcode. In Proceedings of the Thirteenth Annual International Symposium on Computer Architecture (June 1986), pp. 119--127.

....predicted cache miss rates with those obtained from trace driven simulation for various cache sizes and with different degrees of multiprogramming. Trace driven simulation [15] is a popular technique for cache evaluation, especially since address traces for various workloads are publicly available [16, 7]. This section first describes our simulation methodology and then analyzes the results. 6.1 Simulation Methodology Our experiments with the model will use both real traces of multiprogrammed workloads and replicated traces. Replicated traces are like multiprogrammed traces, but they are ....

....and replicated traces. Replicated traces are like multiprogrammed traces, but they are synthesized from a single process trace as explained below. We use real traces of multiprogrammed workloads to observe the variation of cache miss rate with cache size. These traces are obtained using ATUM [16] and described in detail in [6] The 12 multiprogramming traces include MUL6, MUL9 and MUL12, which correspond to VMS workloads for multiprogramming levels of six, nine, and twelve respectively. Examples of processes active in these traces include compilers, SPICE, and Jacobi relaxation. The ....

Anant Agarwal, Richard L. Sites, and Mark Horowitz. ATUM: A New Technique for Capturing Address Traces Using Microcode. In Proceedings of the 13th Annual Symposium on Computer Architecture, pages 119--127, IEEE, New York, June 1986. 20

No context found.

A. Agarwal, L. Sites and M. Horowitz, "ATUM: a new technique for capturing address traces using microcode," Proc. 13th Ann. Int'l Symp. Computer Architecture (ISCA 86), 1986, pp. 119-127.

No context found.

Anant Agarwal, Richard L. Sites, and Mark Horowitz. ATUM: A new technique for capturing address traces using microcode. In Proceedings of the 13th Annual International Symposium on Computer Architecture, pages 119--127, June 1986.

No context found.

Anant Agarwal, Richard L. Sites, and Mark Horowitz, ATUM: A New Technique for Capturing Address Traces Using Microcode, Proc. of the 13th International Symposium on Computer Architecture, Tokyo, Japan, June 1986, pp. 119-127.

No context found.

Anant Agarwal, Richard L. Sites, and Mark Horowitz, ATUM: A New Technique for Capturing Address Traces Using Microcode, Proc. of the 13th International Symposium on Computer Architecture, Tokyo, Japan, June 1986, pp. 119-127.

No context found.

A. Agarwal, R. L. Sites, and M. Horowitz. ATUM: A New Technique for Capturing Address Traces Using Microcode. In Proceedings of the 13th Annual Symposium on Computer Architecture, pages 119--127, June 1986.

No context found.

A. Agarwal, R. Sites, and M. Horowitz. ATUM: A New Technique for Capturing Address Traces Using Microcode. In Proc. 13th International Symposium on Computer Architecture, pages 119--127, May 1986.

No context found.

Agarwal, A., Sites, R. and Horowitz, M. ATUM: A New Technique for Capturing Address Traces Using Microcode. Proceedings 13th Annual Symposium on Computer Architecture (June 1986).

No context found.

A. Agarwal, R. L. Sites, and M. Horowitz, ATUM: A new technique for capturing address traces using microcode, In Proc. of 13th Int. Symp. on Computer Architecture, pages 119--127. IEEE, 1986.

No context found.

A. Agarwal, R. L. Sites, and M. Horowitz, ATUM: A new technique for capturing address traces using microcode, In Proc. of 13th Int. Symp. on Computer Architecture, pages 119--127. ACM, 1986.

No context found.

A. Agarwal, R. L. Sites, and M. Horowitz, ATUM: A new technique for capturing address traces using microcode, In Proc. of 13th Int. Symp. on Computer Architecture, pages 119--127. IEEE, 1986.

No context found.

A. Agarwal, R. L. Sites, and M. Horowitz, ATUM: A new technique for capturing address traces using microcode, In Proc. of 13th Int. Symp. on Computer Architecture, pages 119--127. IEEE, 1986. The authors describe a new technique for collecting address traces by instrumenting the microcode to save addresses in a reserved section of memory.

No context found.

M. H. Anant Agarwal, Richard Sites. ATUM: A new technique for capturing address traces using microcode. IEEE, 1986. 24

No context found.

Anant Agarwal, Richard L. Sites, and Mark Horowitz. ATUM: A New Technique for Capturing Address Traces Using Microcode. In Proceedings of the 13th Annual Symposium on Computer Architecture, pages 119--127, IEEE, New York, June 1986.

No context found.

Agarwal, A., Sites, R. L. and Horowitz, M. ATUM: A new technique for capturing address traces using microcode. In Proceedings of the 13th International Symposium on Computer Architecture, Tokyo, Japan, IEEE, 119-127, 1986.

First 50 documents  Next 50

Online articles have much greater impact   More about CiteSeer.IST   Add search form to your site   Submit documents   Feedback  

CiteSeer.IST - Copyright Penn State and NEC