Morten Kjelso, Mark Gooch, and Simon Jones. Design and Performance of a Main Memory Hardware Data Compressor. In Proceedings of the 22nd EUROMICRO Conference, 1996.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....of the table and the potential of sharing tables among multiple agents. Finally, we discuss the overall implications of these compression schemes on system benchmark performance, design and cost. Related work in the area of compression are as follows. Several papers including [11] 16] [9] have investigated techniques that use a LRU main memory cache to hold pages and files evicted out to disk in compressed form. The purpose is to to reduce disk I O (due to paging or file I O)l thereby significantly improving the performance for applications that require a large amount of memory. ....

....[1] 14] takes this approach in order to reduce the need for large memory capacity on servers. With the considerable interest in compression in the main memory, several studies have examined compressibility of main memory data and started to look for specialized compression algorithms [3] [9]. Compression at the L1 and L2 cache level has also been considered. Reference [17] considers a frequent value compression scheme to replace frequently occurring values in the cache into indicies to a table containing the frequent values. This compression is based on the premise that a majority of ....

M. Kjelso, M. Gooch, S. Jones, " Design and performance of a main memory hardware data compressor", Proceedings of the 22nd EUROMICRO Conference, Beyond

....direction for future work in this area. 2 Background on Compression Techniques In this section, we provide a brief overview of the past work in the compression area, particularly as it relates to increasing the system performance. 2. 1 Disk Memory Compression Techniques Several papers including [19, 26, 13] have investigated the use of compressed storage to reduce paging. These swapspace compression techniques use a LRU main memory cache to hold evicted pages in compressed form and intercept page faults to check if the requested page is available in the cache before a disk access is initiated. Such ....

....have examined compressibility of main memory data and specialized compression algorithms. Reference [12] studies compressibility of many popular Unix desktop applications using both the traditional algorithms (e.g. LZW, Arithmetic coding [20] and the X RL algorithm invented by the authors [13]. The latter algorithm encodes 4 bytes at a time using partial matching of bytes and dynamic coding based on a small dictionary. It is claimed to be especially suited for small block sizes and hardware implementation. The authors show that this can be easily implemented in hardware to provide 4 ....

[Article contains additional citation context not shown here]

M. Kjelso, M. Gooch, S. Jones, " Design and performance of a main memory hardware data compressor", Proceedings of the 22nd EUROMICRO Conference, Beyond 2000.

....direction for future work in this area. 2 Background on Compression Techniques In this section, we provide a brief overview of the past work in the compression area, particularly as it relates to increasing the system performance. 2. 1 Disk Memory Compression Techniques Several papers including [19, 26, 13] have investigated the use of compressed storage to reduce paging. These swap space compression techniques use a LRU main memory cache to hold evicted pages in compressed form and intercept page faults to check if the requested page is available in the cache before a disk access is initiated. Such ....

....have examined compressibility of main memory data and specialized compression algorithms. Reference [12] studies compressibility of many popular Unix desktop applications using both the traditional algorithms (e.g. LZW, Arithmetic coding [20] and the X RL algorithm invented by the authors [13]. The latter algorithm encodes 4 bytes at a time using partial matching of bytes and dynamic coding based on a small dictionary. It is claimed to be especially suited for small block sizes and hardware implementation. The authors show that this can be easily implemented in hardware to provide 4 ....

[Article contains additional citation context not shown here]

M. Kjelso, M. Gooch, S. Jones, " Design and performance of a main memory hardware data compressor", Proceedings of the 22nd EUROMICRO Conference, Beyond 2000.

....that the information technology (IT) professional must trade off against computing goals. Data compression techniques are employed pervasively throughout the computer industry to increase the overall cost efficiency of storage and communication media. However, despite some experimental work [1, 2], system main memory compression has not been exploited to its potential. IBM Memory Expansion Technology (MXT ) addresses the system memory cost issue with a new memory system architecture that more than doubles the effective capacity of the installed main memory without significant added cost. ....

M. Kjelso, M. Gooch, and S. Jones, "Design and Performance of a Main Memory Hardware Data Compressor," Proceedings of the 22nd EUROMICRO Conference, IEEE, 1996, pp. 423--430.

.... or better, and some commercial programs have been available to exploit this fact (for example, see [1] Such observations have led to the consideration of systems in which the contents of main memory are maintained in compressed form, and decompressed compressed on a page basis (for example, see [2, 3]) However, when the unit of compression is a cache line (that is, cache lines in main memory are decompressed on misses and recompressed on writebacks) it is necessary to develop some new technology in order to obtain a practical system. Here we describe results associated with the development ....

....on extensions to Lempel Ziv (LZ) methods. In particular, parallel, shared dictionary techniques [8] implemented using content addressable memory (CAM) permit effective compression decompression at main memory bandwidths. A serial approach, but based on a larger alphabet of multiple byte entries [2], also offers some speedup over standard LZ approaches. Next, changes in memory management must be made to the operating system, since with compression, the logical total main memory size may vary dynamically. Issues associated with such management are discussed in [9] Finally, a way must be ....

M. Kjelso, M. Gooch, and S. Jones, "Design and Performance of a Main Memory Hardware Data Compressor," Proceedings of the 22nd EUROMICRO Conference, IEEE, 1996, pp. 423--430.

....compress the physical memory. With these software mechanisms the applications believe that the system has a larger amount of physical memory. Anyway, the achievements obtained by such systems are not clear [8, 14] The same idea has also been done in hardware with much better performance gains [6]. There have also been many proposals to decrease the number of disk accesses for swapping issues. For instance, some work has been devoted to minimize the number of pages that have to be swapped out. If the contents of a page is irrelevant to the application execution, this page does not need to ....

KJELSO, M., GOOCH, M., AND JONES, S. Design and performance of a main memory hardware data compressor. In Proceedings of the 22nd Euromicro Conference (September 1996), IEEE Computer Society Press, pp. 423--430.

....the physical memory. With these software mechanisms the applications believe that the system has a larger amount of physical memory. Nevertheless, the achievements obtained by such systems are not clear [22, 23] The same idea has also been proposed in hardware with much better performance gains [24, 25], but only simulations have been done. In this last project, they have proposed a memory system with a hardware compressor that dynamically compresses the main memory when the working set of the 19 system does not fit in the physical memory. There have also been many proposals to decrease the ....

....space assigned to it. We have presented results that show that increasing the swap space between 1.5 and 2 times is easy to achieve. Furthermore, it is interesting to notice other more theoretical studies of similar ideas have also obtained good performance results using very different test suits [24, 25, 6]. We have also postulated that the ideas presented here can also be used inside out of core applications that handle their own memory. This widens the range in where the idea of a compressed cache can be used. Finally, it is very important to notice that the mechanism presented in this paper ....

Kjelso, M., Gooch, M., and Jones, S. Design and performance of a main memory hardware data compressor. In Proceedings of the 22nd Euromicro Conference (September 1996), IEEE Computer Society Press, pp. 423--430.

....operations and allocation of free space. A research hardware prototype for a system of this form is currently under development at IBM. A different approach, a page based hardware data compressor in which part of main memory is set aside as a compressed paging store, is described and analyzed in [9, 10]. In current systems, memory comprises a fixed number of page frames which are allocated deallocated by the O.S. virtual memory manager. A list is maintained of frames available for allocation, and operations are initiated by the O.S. whenever the number of such frames falls below a threshold. ....

M. Kjelso, M. Gooch, and S. Jones, "Design and performance of a main memory hardware data compressor," In Proc. 22nd EUROMICRO Conf., pp. 423 --430, IEEE, 1996.

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Morten Kjelso, Mark Gooch, and Simon Jones. Design and Performance of a Main Memory Hardware Data Compressor. In Proceedings of the 22nd EUROMICRO Conference, 1996.

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