N. Ramsey and M. Fernandez. Specifying Representations of Machine Instructions. ACM Transactions on Programming Languages and Systems, 19(3):492-524, May 1997.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....The Walkabout framework uses specifications of the syntax of machine instruction sets to automatically generate machine disassemblers. We reused the specifications we used in the UQBT project [CE00] which were SLED descriptions supported by the New Jersey Machine Code (NJMC) toolkit [RF97] SLED specifications allow users to specify the mapping between the binary and the assembly representation of a machine instruction set, as well as the machine s registers and names for those registers. The NJMC toolkit processes the machine SLED specifications, and generate abstractions ....

....for the SPARC Solaris and x86 Linux environments were generated by this tool. V. THE INTERPRETER Interpreters in the Walkabout framework are automatically generated from specifications of syntax and semantics of machine instruction sets. Specifications include NJMC toolkit s SLED descriptions [RF97] and the UQBT s SSL descriptions [CS98] While SLED describes the instruction syntax, SSL describes the instruction semantics. SSL specifications allow users to specify the mapping between assembly instructions and their equivalent register transfers, to name new registers and declare overlaps, ....

N. Ramsey and M. Fernandez. Specifying representations of machine instructions. ACM Transactions of Programming Languages and Systems, 19(3):492--524, 1997.

....but have slightly different semantics. Specification languages: UQBT uses 3 specification languages to describe different concepts of a machine or conventions used by the OS: SLED (Specification Language for Encoding and Decoding) This language is part of the New Jersey Machine Code toolkit [22] and allows users to specify the syntax of machine instructions. SSL (Semantic Specification Language) This UQBT language allows users to specify the meaning of assembly instructions by means of register transfers [10] PAL (Procedural Abstraction Language) This UQBT language allows ....

N. Ramsey and M. Fernandez. Specifying representations of machine instructions. ACM Transactions of Programming Languages and Systems, 19(3):492--524, 1997.

....shipping only binaries without symbol tables. Without a physically protected hardware platform, a determined adversary can reverse engineer a good deal of information about software. Techniques and tools to support reverse engineering are an area of active research. In fact, previous research [5, 7, 21, 26] demonstrates how control flow graphs, profile information, compiler generated binary idioms, and even slices can be derived by analyzing and instrumenting binaries. Decompilation (converting binary to source code) and binary porting (converting binaries from one machine architecture to another) ....

N. Ramsey and M. Fernandez. Specifying representations of machine instructions. ACM Transactions on Programming Languages and Systems, 1997.

....processors, superscalar processors, VLIW processors etc. ISDL [3] work by the group at MIT aims at developing retargetable assemblers, disassemblers etc. They are also exploring the ways to synthesize the processor out of the ISDL specifications. New Jersey tool kit developed in the SLED [4] work essentially uses the specification level of the instruction set coding for the processors which can be used by the retargetable assemblers and disassemblers. PlayDoh [5] architecture specification methodology developed by the HP laboratories aims at developing performance oriented compilers ....

N. Raksey and Fernandez, Specifying representations of machine instructions, ACM transactions on Programming Languages and Systems, 19(3), May 1997.

....a problem and allowing the portability of the tools by reuse of specifications for a different machine. The specification of the syntax of machine instructions and its associated assembly mnemonics has been made possible through the SLED (Specification Language for Encoding and Decoding) language [10] implemented by the New Jersey Machine Code (NJMC) toolkit [9] The toolkit allows users to write a specification for the syntax of machine instructions for a particular machine, and decode or encode to that syntax based on extra language statements available in the toolkit. In this way, a decoder ....

....low level machine dependencies such as memory alignment are also specified in ISP. EEL, an executable editing library [7] which aids users instrument executable programs, developed a simple semantic specification language based on the SLED language of the New Jersey Machine Code (NJMC) toolkit [9, 10]. EEL extends NJMC s specification constructs with a semantic construct, sem, which provides a simple attribute description of the semantic of an instruction (or a set of instructions) However, this language only models basic semantics of an instruction and does not provide a way of specifying ....

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N. Ramsey and M. Fern'andez. Specifying representations of machine instructions. ACM Transactions of Programming Languages and Systems, 19(3):492--524, 1997.

....the description of a binary file s structure [15] and provides automatic generation of the loader code that decodes binary files. Currently, this is experimental work. SLED: the specification language for encoding and decoding supports the description of the syntax of machine instructions [18]. SLED is supported by the New Jersey machine code toolkit [13] which provides partial support for automatically generating an instruction decoder and its components. SSL: the semantic specification language [16] allows for the description of the semantics of machine instructions. It provides ....

Norman Ramsey and Mary Fernndez. Specifying representation of machine instructions. ACM Transactions of Programming Languages and Systems, 19(3):492-524, 1997.

....language, similar to, but more abstract than, the final machine code [8] In particular, instruction addresses are handled symbolically, and a simple stack machine model is used [26,23] rather than anticipating a particular register set. This approach supports machine independent definitions [12,32]. The target intermediate language is also a distinguished subset of the modelling notation. Firstly, we consider individual instructions [31,19] Each instruction is represented by updates to machine level constructs as shown in Table 5. Here, i is an integer valued constant or variable name; d ....

....to translate such a program to executable machine code, or even to interpret it [26] are well established in compiler technology. For instance, recent representations of particular machine instruction sets, like MIPS R3000, SPARC, Alpha or Intel Pentium Instructions within a unified model [34,32] show how intermediate representations such as ours can be instantiated for specific architectures. 1) Symbolic instruction locations must be instantiated with actual addresses (but no addresses need be reserved for the non executable assume and deadline instructions , since no machine code ....

N. Ramsey and M. F. Fern'andez. Specifying representations of machine instructions. ACM Transactions on Programming Languages and Systems, 19(3):492--524, May 1997.

....a simple resourceable loader, supports the automatic generation of code to decode files specified using the BFF language. SLED: the specification language for encoding and decoding supports the description of the syntax of machine instructions; i.e. its binary to assembly mnemonic representation [18]. SLED is supported by the New Jersey machine code toolkit [13] The toolkit provides partial support for automatically generating an instruction decoder for a particular SLED specification. Current machines specified in this form include the Pentium, SPARC, MIPS and Alpha. SSL: the semantic ....

Norman Ramsey and Mary Fernndez. Specifying representation of machine instructions. ACM Transactions of Programming Languages and Systems, 19(3):492-524, 1997.

....as shipping only binaries without symbol tables. Without a physically protected hardware platform, a determined adversary can reverse engineer a good deal of information about software. Techniques and tools to support reverse engineering are an area of active research. In fact, previous research [7, 9, 25, 32] demonstrates how control flow graphs, profile information, compiler generated binary idioms, and even slices can be derived by analyzing and instrumenting binaries. De Compilation (converting binary to source code) and binary porting (converting binaries from one machine architecture to another) ....

N. Ramsey and M. Fernandez. Specifying representations of machine instructions. ACM Transactions on Programming Languages and Systems, 1997.

....but they differ significantly. nML requires explicit attribute equations to write assembly language syntax and binary representations; the CSDL language SLED uses an implicit syntax for assembly language and a more sophisticated, less error prone sublanguage for describing binary representations (Ramsey and Fern andez 1997). nML has no mechanism for abbreviating common idioms, making it harder to specify semantics in detail. The published papers suggest that the register transfers used in nML do not carry as much information as the register transfers described in this paper. LISAS (Cook and Harcourt 1994) is another ....

....to instructions, storage, or both, and that they use the models of instructions and storage presented below. Instructions In CSDL, an instruction set is a list of instructions together with information about their operands. The model is based on experience with the New Jersey Machine Code Toolkit (Ramsey and Fern andez 1997), which has been used to build several machine level tools. Although instruction names in assembly languages are typically overloaded, CSDL requires instructions to have unique names, because tools often need uniquely named code for each instruction in an instruction set. For example, an assembler ....

Ramsey, Norman and Mary F. Fern'andez. 1997 (May). Specifying representations of machine instructions. ACM Transactions on Programming Languages and Systems, 19(3):492--524.

....shipping only binaries without symbol tables. Without a physically protected hardware platform, a determined adversary can reverse engineer a good deal of information about software. Techniques and tools to support reverse engineering are an area of active research. In fact, previous research [3, 5, 19, 22] demonstrates how control flow graphs, profile information, compiler generated binary idioms, and even slices can be derived by analyzing and instrumenting binaries. Decompilation (converting binary to source code) and binary porting (converting binaries from one machine architecture to another) ....

N. Ramsey and M. Fernandez. Specifying representations of machine instructions. ACM Transactions on Programming Languages and Systems, 1997.

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N. Ramsey and M. Fernandez. Specifying representations of machine instructions. ACM Transactions of Programming Languages and Systems, 19(3):492--524, 1997.

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Norman Ramsey and Mary F. Fern'andez. Specifying representations of machine instructions. ACM Transactions on Programming Languages and Systems, 1997. To appear.

....message if it guessed the wrong type for that left hand side. The Computer Journal, Vol. No. 10 Norman Ramsey 6.1. Case study I have used the combinators in this paper to help build compilers for SLED, the Specification Language for Encoding and Decoding of machine instructions [19] and for RTL, a language for describing instructions semantics [20] The RTL compiler is still under development, but the SLED compiler is mature enough to use to evaluate the effectiveness of the error combinators. To evaluate how this technique changes a compiler s source code, I examined the ....

....To evaluate how this technique changes a compiler s source code, I examined the uses of the error combinators in different parts of the SLED compiler. This compiler reads a specification of the binary representations of instructions and emits code that encodes or decodes the instructions [19]. The compiler is implemented in about 16,000 lines of Standard ML, which may be divided into several parts. ffl The encoding and decoding back ends, plus support for generating C code and ML code, are about 10,000 lines, and they are oblivious of errors. ffl Lexing and parsing are about 1,000 ....

Norman Ramsey and Mary F. Fern'andez. Specifying representations of machine instructions. ACM Transactions on Programming Languages and Systems, 19(3):492--524, May 1997.

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N. Ramsey and M. Fernandez. Specifying Representations of Machine Instructions. ACM Transactions on Programming Languages and Systems, 19(3):492-524, May 1997.

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N. Ramsey and M. Fernandez. Specifying Representations of Machine Instructions. ACM Transactions on Programming Languages and Systems, 19(3):492--524, May 1997.

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Norman Ramsey and Mary F. Fernandz. Specifying representations of machine instructions. ACM Transactions on Programming Languages and Systems, 19(3):492--524, May 1997.

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