H. Attiya and R. Friedman. A Correctness Condition for HighPerformance Multiprocessors. SIAM Journal of Computing, 27(2):1637--1670, April 1998.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....programs to be data race free [1, 4] 1. 2 Prior Work A number of consistency conditions for shared memory have been proposed over the years, including safety, regularity and atomicity [15, 16] sequential consistency [14] linearizability [12] causal consistency [3] and hybrid consistency [5]. These definitions have all been deterministic with little or no regard to possible errors. Afek et al. 2] and Jayanti et al. 13] have studied a shared memory model in which a fixed set of the shared objects might return incorrect values, while the others never do. This model differs from the ....

H. Attiya and R. Friedman. A Correctness Condition for High-Performance Multiprocessors. In Proceedings of the 24th ACM Symposium on Theory of Computing, pages 679--690, 1992.

....through read and write operations. The study of correctness for shared memory with more general data types was initiated by Herlihy and Wing [17] Sequential consistency and other consistency conditions for general data types has been studied by Attiya and Welch [5] and Attiya and Friedman [4]. The rest of the paper is organized as follows. Section 2 introduces basic terminology that is used in the rest of the paper. Section 3 contains the definition of a sequentially consistent shared memory and introduces our new method for proving sequential consistency. Section 4 contains ....

H. Attiya and R. Friedman. A correctness condition for high-performance multiprocessors. In Proc. 24th ACM Symp. on Theory of Computing, pages 679--691, 1992.

....through read and write operations. The study of correctness for shared memory with more general data types was initiated by Herlihy and Wing [17] Sequential consistency and other consistency conditions for general data types has been studied by Attiya and Welch [5] and Attiya and Friedman [4]. The rest of the paper is organized as follows. Section 2 introduces basic terminology that is used in the rest of the paper. Section 3 contains the definition of a sequentially consistent shared memory and introduces our new method for proving sequential consistency. Section 4 contains ....

H. Attiya and R. Friedman. A correctness condition for high-performance multiprocessors. In Proc. 24th ACM Symp. on Theory of Computing, pages 679--691, 1992.

....(e.g. those allowed by more relaxed consistency models) We build on a large body of previous work that has used such a programmer based approach. In particular, several papers have been published to determine the information needed to exploit optimizations of current relaxed consistency models [1, 5, 6, 9, 10, 20, 22, 18, 23, 24, 30]. However, the process of determining such information has been mostly ad hoc, and does not provide insight into information that can be used for other future optimizations. Further, the proofs that the information is correct are fairly complex [6, 7, 9, 10, 22, 23, 24, 30] and or prohibit common ....

....models [1, 5, 6, 9, 10, 20, 22, 18, 23, 24, 30] However, the process of determining such information has been mostly ad hoc, and does not provide insight into information that can be used for other future optimizations. Further, the proofs that the information is correct are fairly complex [6, 7, 9, 10, 22, 23, 24, 30] and or prohibit common processor behavior (e.g. some work [9, 10, 23, 24, 30] prohibits true speculative execution as implemented in many current and next generation processors) In contrast to the ad hoc nature of previous applications of the programmer based approach, this paper describes a ....

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H. Attiya and R. Friedman. A Correctness Condition for High-Performance Multiprocessors. In Proc. Symp. on Theory of Computing, pages 679--690, 1992.

....avoid inconsistent system states. The purpose of a data consistency protocol is to provide a consistent view of the shared memory in the presence of multiple copies. Data consistency protocols for implementing shared memories in message passing systems have received much attention [AHJ91, ABND90, AF92, HA90, LH89, ABHN91, MRZ95, RM93] Data consistency protocols implementing strong consistency require that all copies of an object be identical at all times. This, however, may be a very stringent consistency requirement. Lamport proposed the notion of sequential consistency, which states that a ....

H. Attiya and R. Friedman. A correctness condition for high-performance multiprocessors. In Proceedings of the ACM Symposium on Theory of Computing, pages 679--690, 1992.

....Such approach might ooeer more parallelism, but at the cost of signicantly increasing processing and memory overhead [16] It is worth noting that the single writer variant has the advantage of ooeering a stricter model, since it is page coherent. For instance, it has been established elsewhere [5] that under pure causal consistency it is not possible to obtain mutual exclusion without cooperation; nevertheless, any non cooperative mutual exclusion protocol (such as Peterson s) is correct under page coherent causal consistency if all its variables are in the same page. Also note that a ....

H. Attiya and R. Friedman. A correctness condition for high performance multiprocessors. In Proceedings of the 24th ACM Symposium on Theory of Computing, pages 679690. ACM Press, May 1992.

.... framework, if there are more processes than processors, we can address the new problem of finding a way to interleave actions from different processes executed on the same processor, that verify the constraints while using the pipeline at the best of its capabilities (this is a view formalised in [3] see example 2.1) Some processors (like INTEL s Pentium) are even more complex to deal with since some resources may be used by at most two processes in parallel but not three 1 . Example 2.1. We see from figure 2 2.3 that Suppose that we want to execute two instructions add.s one after the ....

H. Attiya and R. Friedman, A correctness condition for high-performance multiprocessors, Proc. of the 24th STOC, ACM Press, 1992.

....through read and write operations. The study of correctness for shared memory with more general data types was initiated by Herlihy and Wing [18] Sequential consistency and other consistency conditions for general data types has been studied by Attiya and Welch [5] and Attiya and Friedman [4]. The rest of the paper is organized as follows. Section 2 introduces basic terminology that is used in the rest of the paper. Section 3 contains the definition of a sequentially consistent shared memory and introduces our new method for proving sequential consistency. Section 4 contains ....

H. Attiya and R. Friedman. A correctness condition for high-performance multiprocessors. In Proc. 24th ACM Symp. on Theory of Computing, pages 679--691, 1992.

....several processes are accessing a common set of objects. 23 Several consistency models for multiprocessor shared and cached memory systems have been proposed in the literature. Examples include sequential consistency [Lamp79, Feke95, Atti94] processor consistency [Good89] and weak consistency [Dubo86, Adve98, Aham95, Ghar98, Atti92, Yehu93, Atti98 and Torr99]. In database field, there were also similar models for assuring consistency in distributed database models. The conditions of sequential consistency in shared memory systems are analogous to serialisation condition for transactions in concurrent database systems [Agra94, Awer97, Adve98 and ....

Hagit Attiya and Roy Friedman. "A correctness condition for highperformance multiprocessors." SIAM Journal on Computing, 27(6): 1637-1670, December 1998. 214

....several processes are accessing a common set of objects. 23 Several consistency models for multiprocessor shared and cached memory systems have been proposed in the literature. Examples include sequential consistency [Lamp79, Feke95, Atti94] processor consistency [Good89] and weak consistency [Dubo86, Adve98, Aham95, Ghar98, Atti92, Yehu93, Atti98 and Torr99]. In database field, there were also similar models for assuring consistency in distributed database models. The conditions of sequential consistency in shared memory systems are analogous to serialisation condition for transactions in concurrent database systems [Agra94, Awer97, Adve98 and ....

....mechanism guarantees that operations will appear to occur in some ordering that is consistent with some condition. Much research has addressed the issue of consistency at various system levels. The major issue seems to be what is a good condition to be supported by the consistency mechanism [Atti92]: 1. what conditions can be implemented efficiently, 2. what conditions can be used conveniently, 3. and what conditions support faster programs. Most of the research on this subject addressed strong consistency conditions like sequential consistency and linearizability [Atti92, Atti94, ....

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Hagit Attiya, Roy Friedman. "A correctness condition for highperformance multiprocessors." STOC '92. Proceedings of the twentyfourth annual ACM symposium on Theory of computing, pages 679-690.

....make his program correct. One proposed method for achieving the necessary synchronization is with a constrained style of programming specific to a particular type of multiprocessor architecture [7, 8] Another method is to reason about the program in a mathematical abstraction of the architecture [5]. We take a di#erent approach and derive the synchronization commands from a proof of correctness of the algorithm. The commonly used formalisms for describing multiprocess programs assume atomicity of memory accesses. When an assumption is built into a formalism, it is di#cult to discover from a ....

Hagit Attiya and Roy Friedman. A correctness condition for highperformance multiprocessors. In Proceedings of the Twenty-Fourth Annual ACM Symposium on the Theory of Computing, pages 679--690, 1992.

....research in high performance shared memories [2,3,17,23] has suggested the weakening of memory consistency to reduce the cost of maintaining the consistency of shared memory. Such memories scale well, but they sacrifice some of the consistency guarantees of sequential consistency. Other research [1,5,7,12] has proposed memories that are hybrids of weaker and stronger forms of consistency, allowing a program to use a strongly consistent memory only when it is necessary to do so. One influential weakly consistent memory was proposed by Goodman [15] and is called processor consistency. The DASH ....

....memory was proposed by Goodman [15] and is called processor consistency. The DASH system implements a type of processor consistent memory that is distinct from Goodman s definition; this was described by Gharachorloo et al. 12] Processor consistency has been cited elsewhere in the literature [5,6,10,14]. Unfortunately, the original proposal did not provide a detailed specification of processor consistency, and only an operational definition is provided by Gharachorloo et al. As a result, various researchers have developed different interpretations leading to confusion and contradictory claims. ....

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Hagit Attiya and Roy Friedman. A correctness condition for high performance multiprocessors. In Proceedings of the Twenty-Fourth ACM Symposium on Theory of Computing, pages 679--690. ACM Press, May 1992.

....and sequential consistency require the shared memory to behave like a single memory module, where every operation is atomic. Weaker conditions have also been proposed, such as processor consistency [2] causal memory [3] release consistency [9] pipelined RAM [20] hybrid consistency [4], and mixed consistency [1] Each such condition corresponds to some optimization that can lead to non sequential behavior. As some have observed (e.g. 7] the message passing and shared memory paradigms can be unified by introducing objects. We can model both kinds of systems, and others as ....

Hagit Attiya and Roy Friedman. A correctness condition for highperformance multiprocessors. In STOC '92, pages 679--90, Victoria, British Columbia, Canada, 4--6 May 1992. ACM SIGACT, ACM Press.

....much attention. We surveyed existing correctness criteria in DSM systems in [15] In general, operations to a DSM are classified into two types: competing and non competing (or synchronization and ordinary) 1, 8, 10] It has been shown that many practical applications require competing operations [4]. One of the widely used correctness criteria is sequential consistency [12] that provides only competing operations. In the last decade, concurrency control theory has been extensively studied in the field of transaction based database systems [6, 11, 14] Even though there is strong similarity ....

Attiya, H. and Friedman, R. A correctness condition for high-performance multiprocessors. In Proceedings of the ACM Symposium on Theory of Computing, pages 679--690, 1992.

....of a system [8] Weaker conditions have been defined that allow optimizations that potentially provide better performance, but can lead to nonsequential behavior. These conditions include processor consistency [2, 18] release consistency [17] pipelined RAM (PRAM) 33] hybrid consistency [7], mixed consistency [1] and causal memory [3] The capabilities and characteristics of the various memory consistency conditions have been a fruitful topic of study. Both qualitative and quantitative comparisons have been performed. A qualitative comparison differentiates memories by the kinds ....

....memory. Ordinary read operations read from a consistent snapshot of the memory; hence, they are correct. Finally, writes made before an acquire (in the sequential consistency ordering) are made visible at the time of the acquire due to the snapshot. 3.4. 6 Hybrid Consistency Hybrid consistency [7] is similar to release consistency, in that there are two kinds of operations. In this case, they are called strong and weak operations. The strong operations are either linearizable or sequentially consistent with respect to one another. The weak operations are ordered only by the strong ....

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H. Attiya and R. Friedman. A correctness condition for high-performance multiprocessors. SIAM J. Comput., 27(2), Apr. 1998.

....on an ordering of rewrite rules (each of which corresponds to an event) and, as such, may benefit from the Lamport clock technique which can order events in logical time. There is another body of work that delves into memory consistency models that are more aggressive than sequential consistency [2, 3, 4, 6, 8, 9, 10, 21]. Handling more aggressive models leads to formalisms that are more powerful but more complex than we require (e.g. they must handle non atomic stores) Furthermore, much of this work seeks to characterize when programs will 25 appear sequentially consistent even when running on the more ....

Hagit Attiya and Roy Friedman. A Correctness Condition for High-performance Multiprocessors. In Proceedings of the 24th Annual ACM Symposium on the Theory of Computing, pages 679--690, May 1992.

....ordering of rewrite rules (each of which corresponds to an event) and, as such, may benefit from the Lamport clock technique which can order events. Third, we find Lamport clocks easier to use and of similar formal power to many of the other methods used to define and verify relaxed memory models [1, 2, 3, 6, 8, 9, 20]. Of particular note are the approaches of Collier [3] and Gharachorloo et al. 8] that model a write as p sub operations to each of p processors. We find their approaches more general but harder to use than our approach that splits TSO stores (writes) into two components and leaves Alpha stores ....

Hagit Attiya and Roy Friedman. A Correctness Condition for High-performance Multiprocessors. In Proceedings of the 24th Annual ACM Symposium on the Theory of Computing, pages 679--690, May 1992.

....on an ordering of rewrite rules (each of which corresponds to an event) and, as such, may benefit from the Lamport clock technique which can order events in logical time. There is another body of work that delves into memory consistency models that are more aggressive than sequential consistency [1, 2, 3, 5, 7, 8, 9, 21]. Handling more aggressive models leads to 4 receive ack for A perform bound load, invalidate from cache 5 store to A TABLE 3. 2 nodes, 2 blocks, Lamport time Timestamp N 1 N 2 1.10.2 store to B 1.11.2 load from A 2 invalidate A, send ack 3 receive ack for A 3.1.1 store to A TABLE 2. 2 ....

Hagit Attiya and Roy Friedman. A Correctness Condition for High-performance Multiprocessors. In Proceedings of the 24th Annual ACM Symposium on the Theory of Computing, pages 679-- 690, May 1992.

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H. Attiya and R. Friedman. A Correctness Condition for HighPerformance Multiprocessors. SIAM Journal of Computing, 27(2):1637--1670, April 1998.

....causal consistency [3, 4] lazy release consistency [29] entry consistency [14] and hybrid consistency [22] In contrast to our service, such systems are geared towards high performance computing, and generally assume non faulty environments and fast local communication. We refer the reader to [7, 8, 22, 53] for other applied and theoretical studies of consistency strategies. The Globe system [49] follows an approach similar to CASCADE by providing a flexible framework for associating various replication coherence models with distributed objects. Among the coherence models supported by Globe are the ....

H. Attiya and R. Friedman. A correctness condition for high-performance multiprocessors. In Proc. of the 24th ACM Symp. on the Theory Of Computing, pages 679--690, May 1992. Revised version: Technical Report #767, Department of Computer Science, The Technion. Submitted for publication.

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Hagit Attiya and Roy Friedman. A correctness condition for highperformance multiprocessors. In Proceedings of the Twenty-Fourth Annual ACM Symposium on the Theory of Computing, pages 679--690, 1992.

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H. Attiya and R. Friedman. A correctness condition for high-performance multiprocessors. Technical Report #719, Technion -- Israel Institute of Technology, Department of Computer Science, March 1992.

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Attiya, H. and Friedman, R. (1992) A correctness condition for high-performance multiprocessors. In Proc. 24th Ann. ACM Symp. on the Theory of Computing, pp. 679--690.

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H. Attiya and R. Friedman. A correctness condition for highperformance multiprocessors. SIAM J. Comput., 27(6):1637-- 1670, Dec. 1998.

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Hagit Attiya and Roy Friedman. A correctness condition for high-performance multiprocessors. SIAM Journal on Computing, 27(6), pages 1637--1670, December 1998.

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