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Gordon Brebner, "The swappable logic unit: a paradigm for virtual hardware," in Proceedings of IEEE symposium on FPGAs for custom computing machines, April 1997.

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This paper is cited in the following contexts:
3-D Floorplanning: Simulated Annealing and Greedy.. - Bazargan, Kastner, Majid (2000)   (Correct)

....are described in Section 3. Experimental results are shown in Section 4. Section 5 contains conclusion and discussion on possible ways to improve our algorithms and further experiments to give us more insight on the nature of the problem. 2. Our Model of a Reconfigurable Computing System Brebner [2] suggests an environment in which the runtime system dynamically chooses between hardware (RFU operation) and software (main host CPU instructions) implementations of the same function based on profile data or other criteria. We use the same paradigm in our model. An RFUOP r i can be either ....

Brebner, G. 1997. The swappable logic unit: a paradigm for virtual hardware. Proceedings of IEEE Symposium on FPGAs for Custom Computing Machines pp. 77--86.


(Self-)reconfigurable Finite State Machines: Theory and.. - Köster, Teich (2002)   (Correct)

....the market, some with, some without partial reconfigurability. With reconfiguration times in the order of milliseconds, the time to switch a reconfiguration is thus much smaller than compile times for mapping algorithms or state machines to reconfiguration bit streams. Recent approaches such as [1, 2, 3, 6, 10, 9, 12, 14] describe applications and algorithms exploiting reconfiguration capabilities of dynamically reconfigurable FPGAs such as [15] In order not to take too much time, presynthesized bit streams are generated at compile time and only these configuration streams are overwritten or simply swapped [4] at ....

G. Brebner. The swappable logic unit: a paradigm for virtual hardware. In IEEE Symp. on FPGAs and Custom Computing Machines (FCCM), 1997.


Fast Template Placement for Reconfigurable Computing.. - Bazargan, Kastner.. (2000)   (20 citations)  (Correct)

....to compare effectiveness of different RFUOP placement algorithms. Section 3 deals with the online placement. The offline algorithm is presented in Section 4. Section 5 is the conclusion and suggestions for further research on the subject. 2 Our Model of a Reconfigurable Computing System Brebner [4] suggests an environment in which the runtime system dynamically chooses between hardware (RFU operation) and software (main host CPU instructions) implementations of the same function based on profile data or other criteria. We use the same paradigm in our model. An RFUOP r i can be either ....

G. Brebner. "The Swappable Logic Unit: a Paradigm for Virtual Hardware". In Proceedings of IEEE Symposium on FPGAs for Custom Computing Machines, pages 77--86, 1997.


Physical Design for Reconfigurable Computing Systems.. - Kastner, Bazargan..   (Correct)

....in Section 3 and 4. Experimental results are shown in Section 5. Section 6 contains a conclusion and discussion on possible ways to improve our algorithms and further experiments to give us more insight on the nature of the problem. 2 Our Model of a Reconfigurable Computing System Brebner [2] suggests an environment in which the runtime system dynamically chooses between hardware (RFU operation) and software (main host CPU instructions) implementations of the same function based on profile data or other criteria. We use the same paradigm in our model. An RFUOP r i can be either ....

G. Brebner. "The Swappable Logic Unit: a Paradigm for Virtual Hardware". In Proceedings of IEEE Symposium on FPGAs for Custom Computing Machines, pages 77--86, 1997.


3-D Floorplanning: Simulated Annealing and Greedy.. - Bazargan, Kastner..   (Correct)

....are described in Section 3. Experimental results are shown in Section 4. Section 5 contains conclusion and discussion on possible ways to improve our algorithms and further experiments to give us more insight on the nature of the problem. 2. Our Model of a Reconfigurable Computing System Brebner [2] suggests an environment in which the runtime system dynamically chooses between hardware (RFU operation) and software (main host CPU instructions) implementations of the same function based on profile data or other criteria. We use the same paradigm in our model. An RFUOP r i can be either ....

G. Brebner. "The Swappable Logic Unit: a Paradigm for Virtual Hardware". In Proceedings of IEEE Symposium on FPGAs for Custom Computing Machines, pages 77--86, 1997.


Implications of Reconfigurable VLSI in a Globally Networked .. - Alexander, O'Toole (1997)   (Correct)

....system [28] being of particular interest. It provides designers access to dynamically reconfigurable hardware; however, the Lola language upon which it is based can only describe static circuits rather than dynamic processes [71] Researcher are discovering that better programming environments [3, 12, 13, 14, 39, 46] can significantly ease the burden of programming reconfigurable systems, although much work is still needed in this area. We propose 9 to directly address this problem through the creation of an integrated CAD environment for RVLSI design. 4 Plan of Work In this section we describe our plan to ....

G. Brebner, The Swappable Logic Unit: a Paradigm for Virtual Hardware, in Proceedings of IEEE Workshop on FPGAs for Custom Computing Machines, L. Pocek and J. Arnold, eds., Napa, CA, Apr. 1997, pp. 95--104.


Opportunities for Operating Systems Research in.. - Diessel, Wigley (1999)   (1 citation)  (Correct)

....can be loaded wherever one is removed. If task partitions are a fixed size the placement strategy is simplified since partitions can be paged onto the FPGA surface. It suffices to provide a wiring harness for I O to each page and to maintain an allocation table for managing the free pages [2, 16]. Tasks may need to communicate with each other, thereby making it desirable to co locate them in order to reduce communication delays, and the lengths of routes required. The wiring harness provided to support I O to fixed size partitions can be designed to support arbitrary simultaneous task to ....

Gordon Brebner. The swappable logic unit: a paradigm for virtual hardware. In Pocek and Arnold [18], pages 77 -- 86.


Runtime Reconfigurable Routing - Brebner, Donlin (1997)   (1 citation)  (Correct)

.... This paper is concerned with a more general technique for partially solving the dynamic circuit reconfiguration problem, namely the virtual hardware operating system approach based on the notion of Swappable Logic Units (SLUs) virtual hardware analogues of pages or segments in virtual memory [3, 5]. At this point, the authors advocate a change in terminology: to use the phrase virtual circuitry 1 , instead of virtual hardware . This is strongly influenced by an observation of Negroponte [16] that hardware refers to atoms and software refers to bits. Virtual circuitry is concerned with ....

Brebner, "The Swappable Logic Unit: a Paradigm for Virtual Hardware", Proc. 5th Annual IEEE Symposium on Custom Computing Machines, IEEE Computer Society Press 1997, pp.77--86.


Framework for a Context-Switching Run-Time Reconfigurable System - Lehn (2002)   (1 citation)  (Correct)

No context found.

Gordon Brebner, "The swappable logic unit: a paradigm for virtual hardware," in Proceedings of IEEE symposium on FPGAs for custom computing machines, April 1997.


Non-preemptive Multitasking on FPGAs: Task Placement and.. - Walder, Platzner (2002)   (2 citations)  (Correct)

No context found.

Gordon Brebner. The Swappable Logic Unit: a Paradigm for Virtual Hardware. In Proceedings of the IEEE Symposium on FPGAs for Custom Computing Machines (FCCM). IEEE CS Press, 1997.


Context Switching Strategies in a Run-Time Reconfigurable System - Puttegowda (2002)   (Correct)

No context found.

G. Brebner, "The swappable logic unit: a paradigm for virtual hardware," in Proceedings of IEEE symposium on FPGAs for custom computing machines, April 1997.

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