M. Pedram, "Advanced Power Estimation Techniques", in NATO ASI Series "Low Power Design in Deep Submicron Electronics", Kluwer Academic Publishers, 1997 Home/Search Document Details and Download
Summary Related Articles Check |
This paper is cited in the following contexts:
Using Activation Intervals for Low Power Analysis - Rettberg, Kleinjohann, Hardt (2000) (Correct)
....delivered or exchanged [2] 4] During operation electrical energy is converted to heat energy. The rate, at which energy is taken from the source (V dd ) and converted into heat, is called power dissipation. The power consumption of a chip is calculated by statistical methods or by abstractions [7]. It is a fact that there exists different approaches of power savings in systems [3] 6] 8] The optimization for low power design can be classified into two main areas: technology optimizations . software and compiler optimizations for programmable systems Technology optimizations are ....
M. Pedram, "Advanced Power Estimation Techniques", in NATO ASI Series "Low Power Design in Deep Submicron Electronics", Kluwer Academic Publishers, 1997
Power Estimation Techniques for the Purpose of the.. - Rem, Gerez, Smit (1997) (Correct)
....say that the challenge of high level power estimation is to find models that provide sufficient accuracy while keeping the number of elements in the summation of Equation 1 as small as possible. Overviews of methods for high level power estimation can be found in recently published review papers [16 18]. Many methods for high level power estimation make use of macro models. These are functional descriptions that compute power values for specific hardware modules (functional units, memories, etc. as a function of module parameters (e.g. word lengths) and statistical parameters related to input ....
M. Pedram, "Advanced power estimation techniques," in Low Power Design in Deep Submicron Technology, W. Nebel and J. Mermet, Eds. Kluwer Academic Publishers, Dordrecht, 1997.
Power Estimation Techniques for the Purpose of the Architectural .. - Frank Rem (Correct)
....challenge of high level power estimation is to find models that provide sufficient accuracy while keeping the number of elements in the summation of Equation 1 as small as possible. Overviews of methods for high level power estimation can be found in recently published review papers [16] 17] [18]. Many methods for high level power estimation make use of macro models. These are functional descriptions that compute power values for specific hardware modules (functional units, memories, etc. as a function of module parameters (e.g. word lengths) and statistical parameters related to input ....
M. Pedram, "Advanced power estimation techniques," in Low Power Design in Deep Submicron Technology, W. Nebel and J. Mermet, Eds. Kluwer Academic Publishers, Dordrecht, 1997.
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC