P. Asar, "Towards a multi-formalism framework for architectural synthesis: The ASAR project," in Proc. of Int. Workshop on Hardware/Software Co-Design, pp. 25--32, Sept. 1994. Home/Search Document Details and Download
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Multiobjective Synthesis of Low-Power Real-Time Distributed.. - Dick (2002) (1 citation) (Correct)
....between hardware and software. The ASAR project is a collection of tools and languages that assist a designer in a number of tasks, e.g. specifying the behavior of real time systems, generating systolic arrays, describing reactive systems, and generating pipelined signal processing architectures [36]. Bolsens et al. developed a co design tool that allows interactive refinement of an embedded system specification [37] The design may be partitioned among multiple heterogeneous processors. Buck et al. built a general signal processing co design infrastructure [38] Chiodo et al. automated the ....
P. Asar, "Towards a multi-formalism framework for architectural synthesis: The ASAR project," in Proc. of Int. Workshop on Hardware/Software Co-Design, pp. 25--32, Sept. 1994.
GC: the Data-Flow Graph Format of Synchronous Programming - Pascal Aubry Thierry (Correct)
....with hybrid representation of control and data transfers (the format ASCIS [19] for instance) Thanks to its ability to handle both data and control dependencies, the format GC can join this second category. For example, GC has already been chosen as the common format of the ASAR 3 project [2, 3], the purpose of which is to build a multi formalism framework oriented towards architectural synthesis. In this project, GC will be the common denominator of the different formalisms (including VHDL, the synchronous languages Lustre and Signal, the Alpha language for the design of regular ....
P. ASAR. Towards a multi-formalism framework for architectural synthesis: the ASAR project. In International Workshop on Hardware-Software Codesign, Codes/CASHE'94, September 1994.
A Front-End VHDL Editor for Synthesis tools. - Bouguerba Benzakki (Correct)
....restrictions. 3 SDEV in the Framework ASAR The overall structure of the ASAR framework is sketched in Figure 4. The ASAR framework provides a set of languages and tools oriented towards particular target architectures or domains. A more complete presentation of these tools can be found in [2, 3] . Software Specifications Hardware Software Mixed Simulator System Specifications Vendors Tools S D E V Code Generation Behavioral Specifications Hardware Software Partitioning (Lustre, Signal) Languages Synchronous Lustre Alpha Signal . Language Transformations of each approach ....
P. ASAR. Towards a Multi-formalism Framework for Architectural Synthesis : the ASAR Project Codes/Cashes September 94, Grenoble, France.
VHDL subsets in the SDEV environment : A Case Study : The.. - Bouguerba Benzakki (Correct)
....opportunity to choose between different subsets of VHDL, focusing on RTL Synthesis tools (Synopsys, Compass, 3. The generation of the AST (Abstract Syntax Tree) of VHDL for Front End tool developments, 4. The integration of such a tool in a Framework of Architectural Synthesis Tools: asar[4, 5], 2 VHDL subsets tailored by the designer From the VHDL grammar included in sdev, the user can build his own subset VHDL. This possibility is offered by the tool called TransForm, included in centaur [6] The main characteristics are the ability for the user to delete constructs, or to add new ....
P. ASAR. Towards a Multi-formalism Framework for Architectural Synthesis : the ASAR Project Codes/Cashes September 94, Grenoble, France.
Framework and Multi-Formalism: the ASAR Project - Asar Self-citation (Asar) (Correct)
....synthesis of regular architectures by stepwise refinement. Gaut [14] and Osys [9] are high level synthesis tools from behavioral VHDL descriptions. Gaut is dedicated to signal processing designs; Osys is a general purpose prototype tool. A more complete presentation of these tools can be found in [2]. Software Specifications Hardware Software Mixed Simulator System Specifications Intermediate Common Formalism Vendors Tools Code Generation Behavioral Specifications Hardware Software Partitioning (Lustre, Signal) Languages Synchronous Lustre Alpha VHDL Signal . Language Transformations ....
P. ASAR. Towards a Multi-formalism Framework for Architectural Synthesis: the ASAR Project. In Third International Workshop on Hardware/Software Codesign, Grenoble, France, IEEE Computer Society Press, September 1994, 25--32.
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