A. Bailey and M. Josephs. Sequencer circuits for VLSI programming. In Proc. Working Conf. on Asynchronous Design Methodologies, pages 82--90. IEEE Computer Society Press, May 1995. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Contributions to the Design of Asynchronous Macromodular Systems - Plana (1998) (Correct)
....analysis and SPICE simulations, and Section 3.7 presents conclusions. 3.1 Previous Work on Asynchronous Sequencers In non pipelined macromodular systems, the most basic operation is the sequencing of computations or data processing actions. Such sequences can be very long. For 29 example, Bailey [4] reports that the longest sequence in the asynchronous error decoder circuit for a DCC player [92] consists of 48 processes. Two common protocols have been used in asynchronous sequencers: sequential and concurrent. 3.1.1 Sequential Protocol The most common scheme is a sequential protocol. ....
....Counter Decoder Sequencer r1 r2 a1 a2 a3 a4 r4 Sr Sa r3 D E C O D E R C O U N T E R a1 a2 a3 P1 P2 P3 P4 Figure 3.3: Josephs Bailey Counter Decoder Sequencer. Seeking to improve on the Tangram circuit, Josephs and Bailey introduced a centralized sequencer [4]. Figure 3.3 shows a schematic counter decoder sequencer. The counter centralizes the state of the sequencer and the decoder distributes the signals to the processes resulting in improved initial and phase inter process latencies 32 compared to the Tangram tree sequencer. The circuit is ....
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A. Bailey and M. Josephs. Sequencer circuits for VLSI programming. In Proc. Working Conf. on Asynchronous Design Methodologies, pages 82--90. IEEE Computer Society Press, May 1995.
Concurrency-Oriented Optimization for Low-Power Asynchronous.. - Plana, Nowick (1996) (Correct)
.... pipeline control is a very active research area [21, 7, 27] Sequential computation is used in some DSP systems with moderate timing requirements, usually aimed at low power operation, e.g. FIR filter bank [14] DCC error corrector [24] Active research is done in sequencer control also [22, 25, 1]. The focus of this paper is on sequential computation. The optimizations introduced in this paper improve the throughput of an asynchronous sequential system by increasing the amount of concurrent activity. A key control element, that has a large impact on concurrency, is the sequencer. In ....
....a significant reduction in power can be achieved over existing designs, without affecting system throughput. 4 Asynchronous Control A basic control operation in macromodular systems is the sequencing of computations or data processing actions. Such sequences can be very long. For example, Bailey [1] reports that the longest sequence in the asynchronous error decoder circuit for a DCC player [24] consists of 48 processes. Two common operation protocols are used in asynchronous sequencers: sequential and concurrent. ffl Sequential Protocol. Figure 2(a) shows a sequencer module controlling the ....
[Article contains additional citation context not shown here]
A. Bailey and M. Josephs. Sequencer circuits for VLSI programming. In Proc. Working Conf. on Asynchronous Design Methodologies, pages 82--90. IEEE Computer Society Press, May 1995.
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