S. Ta¸siran, Y. Kukimoto and R. K. Brayton. Computing Delay with Coupling Using Timed Automata. In Proceedings of the 1997 ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, pages 232--244, 1997, Austin, Texas.  Home/Search   Document Not in Database   Summary   Related Articles

....Second, circuit level effects such as capacitive coupling between wires (also referred to as cross talk) need to be taken into account. As a result, it is now commonly accepted that existing methods for modeling and computing delays are inadequate for deep sub micron circuits (See, for instance, [CWS97,TKB97] and other related papers in the TAU 97 Workshop) Existing timing analysis schemes do not use sufficiently accurate gate delay models, and do not account for cross talk. Timed automata have been used to model the delay characteristics of gates and circuits [MP95,TAKB96,TB97,FK95] Previously, ....

S. Ta¸siran, Y. Kukimoto and R. K. Brayton. Computing Delay with Coupling Using Timed Automata. In Proceedings of the 1997 ACM/IEEE International Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, pages 232--244, 1997, Austin, Texas.

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