R. Bagrodia, K.M. Chandy, and W-L. Liao. An experimental study on the performance of the space-time algorithm. In Workshop on Parallel and Distributed Simulation, January 1992. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
PARALLEL SWITCH-LEVEL SIMULATION of VLSI CIRCUITS - Chen, Jha, Bagrodia (1995) Self-citation (Bagrodia) (Correct)
....incur a number of overheads including checkpointing, rollback, and GVT computation, which must be reduced to derive reasonable benefit from parallel execution of the simulation model. Details of the optimistic implementation of Maisie designed to reduce many of these overheads are described in [4, 3]. 4 Experiments and Results Five different circuits were used to measure the performance of MIRSIM. The largest, a 64 bit squaring circuit called Square64, consists of approximately 68K transistors. The smallest circuit, an 8x8x8 dynamic RAM called Chip2u, has about 3K transistors. The other ....
R. Bagrodia, K.M. Chandy, and W-L. Liao. An experimental study on the performance of the space-time algorithm. In Workshop on Parallel and Distributed Simulation, January 1992.
PARALLEL SWITCH-LEVEL SIMULATION of VLSI CIRCUITS - Chen, Jha, Bagrodia (1995) Self-citation (Bagrodia) (Correct)
....on networks of workstations and on distributed memory multicomputer like the IBM SP1. Maisie implementations have yielded good speedups for queuing network benchmarks with both conservative and optimistic algorithms, with speedups approaching close to linear for large grain computations[18, 2] The IBM SP1 implementations have been used for gate level circuit simulations[6, 5] and for simulation of parallel programs[23] The MIRSIM program contains a driver entity and one other entity type called irsim. The driver entity initiates the simulation by instantiating a set of irsim ....
R. Bagrodia, K.M. Chandy, and W-L. Liao. An experimental study on the performance of the space-time algorithm. Technical Report CSD-910061, Computer Science Dept, UCLA, Los Angeles, CA 90024, August 1991.
Parallel Switch-Level Simulation of VLSI Circuits - Chen, Jha, Bagrodia (1995) (Correct)
No context found.
R. Bagrodia, K.M. Chandy, and W-L. Liao. An experimental study on the performance of the space-time algorithm. In Workshop on Parallel and Distributed Simulation, January 1992.
Parallel Switch-Level Simulation of VLSI Circuits - Chen, Jha, Bagrodia (1995) (Correct)
No context found.
R. Bagrodia, K.M. Chandy, and W-L. Liao. An experimental study on the performance of the space-time algorithm. Technical Report CSD-910061, Computer Science Dept, UCLA, Los Angeles, CA 90024, August 1991.
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