S. Min, J. Baer, H. Kim, "An Efficient Caching Support for Critical Sections in Large-Scale Shared-Memory Multiprocessors," IBM RC 15311, 1/4/90, IBM Research Division, T.J. Watson.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....knowledge of other processors actions. Most approaches to the cache coherence problem have fo cused on hardware mechanisms to maintain coherence. Un fortunately, the overhead of maintaining coherence in hardware can be high; scaling systems based on hardware co herence is a difficult problem [13]. Snoopy cache schemes, which monitor accesses broadcast on the processor memory interconnect, are now in common use for small scale systems [14, 16] however, snoopy schemes are problematic for large scale machines because such machines cannot be based on a single, central broadcast medium for ....

S. Min, J. Baer, and H. Kim. An efficient caching support for critical sections in large-scale shared-memory multiprocessors. In Proc. of the 1990.

....consistency by retaining stale values. Most approaches to the cache coherence problem have focused on hardware mechanisms to maintain coherence. Unfortunately, the overhead of maintaining coherence in hardware can be high; scaling systems based on hardware coherence is a difficult problem [15]. Snoopy cache strategies, which monitor This work was supported in part by the National Science Foundation under Cooperative Agreement CCR 9120008 through its research contracts with the Center for Research on Parallel Computation at Rice University. y As published in Supercomputing 93 z ....

S. Min, J. Baer, and H. Kim. An efficient caching support for critical sections in large-scale shared-memory multiprocessors. In Proc. of the 1990 International Conference on Supercomputing/Computer Architecture News, pages 4--47, June 1990. Special issue of Computer Architecture News, 18(3), Sept. 1990.

....The remainder of this section details these innovations. 3.1.1. Incorporating Atomicity An important feature of the systems we have proposed is that they provide support for atomicity. The basis of our atomicity model is derived from the critical section model proposed by Min, Baer and Kim [MBK90]. In our model, a processor issues a batch of one or more references after each think period. We have chosen to model the batches as consisting entirely of either private or shared references. We have made this choice since we assume conventional systems benefit by minimizing the size of shared ....

....that shared atomic actions are executed without conflicting, interleaved accesses by other processors, i.e. atomically. Thus we must provide a reasonable method for assigning locks to shared atomic actions. Given the composition of the shared atomic actions, we can define a critical section graph [MBK90]. Each shared atomic action is a node in this graph. The edges of the graph are determined by the possible conflicting accesses of these atomic actions. Two atomic actions have possible conflicting accesses if the set of writable variables of one intersects with the set of all variables of the ....

Min, S.L., J.L. Baer and H.J. Kim, "An Efficient Caching Support for Critical Sections in Large-Scale Shared-Memory Multiprocessors," RC15311, IBM Research Report, 1990.

....have no knowledge of other processors actions. Most approaches to the cache coherence problem have focused on hardware mechanisms to maintain coherence. Unfortunately, the overhead of maintaining coherence in hardware can be high; scaling systems based on hardware coherence is a difficult problem [13]. Snoopy cache schemes, which monitor accesses broadcast on the processor memory interconnect, are now in common use for small scale systems [14, 16] however, snoopy schemes are problematic for largescale machines because such machines cannot be based on a single, central broadcast medium for ....

S. Min, J. Baer, and H. Kim. An efficient caching support for critical sections in large-scale shared-memory multiprocessors. In Proc. of the 1990 International Conference on Supercomputing/Computer Architecture News, pages 4--47, June 1990. Special issue of Computer Architecture News, 18(3), Sept. 1990.

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S. Min, J. Baer, H. Kim, "An Efficient Caching Support for Critical Sections in Large-Scale Shared-Memory Multiprocessors," IBM RC 15311, 1/4/90, IBM Research Division, T.J. Watson.

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