M. C. Papaefthymiou. On retiming synchronous circuitry and mixed-integer optimization. Master's thesis, Massachusetts Institute of Technology, September 1990. Available as MIT/LCS/TR-486. Home/Search Document Details and Download
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Understanding Retiming through Maximum Average-Delay Cycles - Marios Papaefthymiou (1994) (11 citations) Self-citation (Papaefthymiou) (Correct)
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M. C. Papaefthymiou. On retiming synchronous circuitry and mixed-integer optimization. Master's thesis, Massachusetts Institute of Technology, September 1990. Available as MIT/LCS/TR-486.
Optimizing Two-Phase, Level-Clocked Circuitry - Ishii, Leiserson, Papaefthymiou (1997) (11 citations) Self-citation (Papaefthymiou) (Correct)
No context found.
M. C. Papaefthymiou. On retiming synchronous circuitry and mixed-integer optimization. Master's thesis, Massachusetts Institute of Technology, September 1990. Available as MIT/LCS/TR-486.
Optimizing Two-Phase, Level-Clocked Circuitry - Ishii, Leiserson, Papaefthymiou (1992) (11 citations) (Correct)
No context found.
M. C. Papaefthymiou. On retiming synchronous circuitry and mixed-integer optimization. Master's thesis, Massachusetts Institute of Technology, September 1990. Available as MIT/LCS/TR-486.
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