J. Gong, and D. Gajski, Model Refinement For HardwareSoftwareCodesign, Proceedings of the European Design & Test Conference, pp 270-274, March 1996.  Home/Search   Document Details and Download   Summary   Related Articles   Check

....have examined the manner in which constraints on an embedded system are specified. Dasarathy described a way to represent and validate timing constraints in embedded systems [19] Gong et al. developed an algorithm that automatically refines constraint specifications after manual partitioning [20]. Others have focused on performance analysis of hardware software systems. Calvez and Pasquier developed an event monitor to analyze the performance of an existing hardware software system [21] It is often useful to evaluate the performance of an embedded system that has been designed but not ....

J. Gong, D. D. Gajski, and S. Bakshi, "Model refinement for hardware-software codesign," ACM Trans. on Design Automation of Electronic Systems, vol. 2, pp. 22--41, Jan. 1997.

.... have become more sophisticated, hardware software co design has become increasingly important [Gup93, Hen95] Key optimization problems in hardware software co design have been identified as system component allocation, functional partitioning, quality metrics estimation, model refinement [Wil94, Gon97] memory allocation using memory reuse for arrays and storage order [DeG97] The increased interest in embedded system design with reusable core components has encouraged the development of high level architecture and ASIC evaluation models. For example, The Microprocessor Report presents a ....

Jie Gong, D.D. Gajski, and S. Bakshi. Model refinement for hardware-software codesign. Transactions on Design Automation of Electronic Systems, vol.2, (no.1), pp.22-41, 1997.

....a set of communication units that implement the data exchange between the subsystems. B. Previous work Most of the work in communication synthesis for codesign has focussed on interface synthesis assuming a fixed network structure [9] 15] Only few works in codesign handle network synthesis [7] [13] [37] In [13] Gong s network synthesis is guided by the mapping of variables (shared or private) to memory (local or global) In [37] Yen create a new processing element and a bus when it is not possible to assign a process to an already existing processing element or a communication on a bus ....

....units that implement the data exchange between the subsystems. B. Previous work Most of the work in communication synthesis for codesign has focussed on interface synthesis assuming a fixed network structure [9] 15] Only few works in codesign handle network synthesis [7] 13] 37] In [13] Gong s network synthesis is guided by the mapping of variables (shared or private) to memory (local or global) In [37] Yen create a new processing element and a bus when it is not possible to assign a process to an already existing processing element or a communication on a bus without ....

J. Gong, and D. Gajski, Model Refinement For Hardware Software Codesign, Proceedings of the European Design & Test Conference, pp 270-274, March 1996.

....sensing data at the correct time. This allows multiple communication events to form a stream or a transaction without the need for detailed signalling protocols. System level design occurs at the early part of a process that involves refinement to lower level hardware and software implementations [18]. A model at the system level should be expressed in a form that enables verification that a refinement correctly implements the model. Possible approaches include behavioural synthesis [32] correct by construction) and formal verification using model checking and equivalence checking [23, 33] ....

J. Gong, D. D. Gajski, and S. Bakshi, "Model Refinement for Hardware-Software Codesign," ACM Tansactions on Design Automation of Electronic Systems, vol. 2, no. 1, pp. 22--41, 1997.

....is a unique and important intermediate representation of functionality, necessary to verify the systemlevel allocation and partitioning decisions we have made, without yet requiring detailed implementation decisions for each component. Further details on refinement can be found in [8] and [46]. V. EXPERIMENTS We have conducted a series of experiments to explore design alternatives for several industrial examples. Here we present results for one particular example: a fuzzy logic controller [47] Four library components were available: a standard processor (Intel 8051) and three ....

J. Gong, D. Gajski, and S. Bakshi, "Model refinement for hardwaresoftware codesign," in Proc. European Design Test Conf. (EDTC), 1996.

....specification is a unique and important intermediate representation of functionality, necessary to verify the system level allocation and partitioning decisions we have made, without yet requiring detailed implementation decisions for each component. Further details on refinement can be found in [8, 46]. 5 Experiments We have conducted a series of experiments to explore design alternatives for several industrial examples. Here we present results for one particular example: a fuzzy logic controller [47] Four library components were available: a standard processor (Intel 8051) and three custom ....

J. Gong, D. Gajski, and S. Bakshi, "Model refinement for hardware-software codesign," in Proceedings of the European Design and Test Conference (EDTC), 1996.

....protocols for memory accesses. Note the large amount of detail that must be added to the specification. Also, note that the designer has access to that detail, since a refined specification was generated, which can be viewed and edited. Due to space limitations, we refer the reader to [11, 18] for details on refinement. 6 Experiments SpecSyn, under development since 1989, consists of over 150,000 lines of C code. Its main interface is a spreadsheetlike display showing each component and functional object along with annotations, constraints and metric values for each. Menu options ....

J. Gong, D. Gajski, and S. Bakshi, "Model refinement for hardware-software codesign," in Proceedings of the European Design and Test Conference (EDTC), 1996.

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J. Gong, and D. Gajski, Model Refinement For HardwareSoftwareCodesign, Proceedings of the European Design & Test Conference, pp 270-274, March 1996.

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J. Gong and D. Gajski, Model Refinement For Hardware Software Codesign, Proceedings of the European Design & Test Conference, March 1996.

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