J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software---Concepts and Tools, 17(3):103--120, 1996. Home/Search Document Not in Database Summary Related Articles Check |
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Formally-Based Design Evaluation - Turner, He (2001) (Correct)
....refuse the actions offered by the environment. After the system consumes an input and produces its outputs, the environment has to accept the outputs. In other words, such a system will never reject inputs and its environment will never block outputs. Communication is thus no longer symmetric. In [18] this kind of behaviour is modelled as an IOLTS (Input Output Labelled Transition System) which is a special kind of LTS. In an IOLTS, the set of actions is partitioned into inputs and outputs. Intuitively this means that input actions are always enabled in any state. The DILL approach allows ....
J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software Concepts and Tools, 17:103--120, 1996.
Specification Coverage Aided Test Selection - Pyhälä, Heljanko (2003) (Correct)
....and this can achieved by conforming to a common specification. Formal conformance testing formalizes the concepts of conformance testing [16] Essential notions include the implementation, the specification and conformance relation between these two. In this work we use ioco conformance relation [17]. Previously there has been work implementing on the fly testers [4] for ioco conformance relation. These basically test whether the implementation behaves according to the specification. The tester has to make choices: what inputs it gives to the implementation and when it waits for an output. ....
J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software---Concepts and Tools, 17(3):103-- 120, 1996.
Automated Boundary Testing from Z and B - Legeard, Peureux, Utting (2002) (5 citations) (Correct)
....Card GSM 11 11 case study, with test case generation from a B formal model [1] This showed that the generated test suites had good coverage, and that the test design e ort was reduced by 30 . During the last decade, test generation from formal speci cation has been a very active research area [2, 3]. For model based speci cation, as in Z [4] On sabbatical leave from the University of Waikato, New Zealand. 2 Bruno Legeard et al. VDM [5] or B [6] a now classical method was presented by Jeremy Dick and Alain Faivre [7] It consists of two steps: 1. generating an abstract Finite State ....
J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software-Concepts and Tools, 17(3):103-120, 1996.
Protocol-Inspired Hardware Testing - He, Turner (1999) (6 citations) (Correct)
....be known explicitly. Making the assumption that an implementation has a formal model is referred to as the test hypothesis. This makes it possible to express conformance of an implementation with respect its specification using a formal relation. One such relation, ioconf (input output conformance [24]) is used as the criterion for correct hardware design. The test suite for a circuit is generated from a Lotos specification following an algorithm based on that proposed by Tretmans [24] The authors have extended CADP (Csar Ald ebaran Development Package [6] to generate hardware test suites ....
....with respect its specification using a formal relation. One such relation, ioconf (input output conformance [24] is used as the criterion for correct hardware design. The test suite for a circuit is generated from a Lotos specification following an algorithm based on that proposed by Tretmans [24]. The authors have extended CADP (Csar Ald ebaran Development Package [6] to generate hardware test suites automatically. Each test case in the generated test suite is a sequence of input and output signals. Designing test cases as input output sequences is close to engineering practice in ....
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software Concepts and Tools, 17:103--120, 1996.
An Approach to Symbolic Test Generation - Rusu, Bousquet, Jeron (2000) (8 citations) (Correct)
....automata with variables and parameters. 1 Introduction It is widely recognized that testing is an essential component of the full lifecycle of software systems. Among the many di#erent testing techniques, conformance testing [11] is one of the most rigorous. The usual theoretical approach [5, 16] is to consider a formal specification of the intended behaviour of the Implementation Under Test (IUT) It allows to define the notion of conformance relation, which defines the correct implementations with respect to the specification. It also allows to formally define test cases, their ....
....of the paper is organized as follows. In Section 2 we define an extension of the LTS model (called IOSTS) to include parameters and variables. In Section 3 we define subclasses of the IOSTS model that are used for specifications, test purposes and test cases. We adapt a conformance relation from [16] to the model of IOSTS. In Section 4 we define a notion of correctness of test cases with respect to specifications and test purposes. In Section 5 we describe how to generate test cases by successively computing a synchronous product between a specification and a test purpose, eliminating ....
J. Tretmans. Test generation with inputs, outputs and quiescence. Software - Concepts and Tools, 17(3):103-120, 1996.
Formal Specification and Analysis of Digital Hardware Circuits in.. - He (2000) (1 citation) (Correct)
....VeriConf is also implemented for checking the relations. Part of this chapter has been published in [JT99b] Chapter 5 explores a new direction in applying formal methods to digital circuit design. The foundation of the chapter is the theory of testing input output transition systems (IOLTSs) Tre96] an extension of traditional LOTOS testing theory. Following the introduction of the theory, the chapter illustrates the suitability of applying it to generating test cases for digital circuits. To achieve satisfactory coverage of the test cases, an algorithm based on a transition tour of the ....
....In this section, two new relations, termed confor and strongconfor are defined to compare an implementation with its specification. These relations take into account the difference of inputs and outputs of a circuit, and are in fact inspired by the ioco relation suggested by Jan Tretmans [Tre96] University of Twente) for testing communication protocols. In chapter 5, more details about ioco will be given. Suppose a circuit has input set L I and output set LU . Spec and Impl are the specification and the implementation of the circuit respectively. Spec may be partial in the sense that ....
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software Concepts and Tools, 17:103--120, 1996.
Verifying and Testing Asynchronous Circuits using LOTOS - He, Turner (2000) (1 citation) (Correct)
....circuits. This is especially true when the environment of a circuit is not explicitly supplied. Two new relations, confor and strongconfor, are therefore defined to assess (strong) conformance of an implementation to its specification. These relations were inspired by ioconf and ioco in [14] for conformance testing of communications protocols. Suppose Spec is an abstract specification of a circuit and Impl is its implementation specification. Spec may be partial in the sense that in some states it does not accept some inputs, i.e. it is not inputreceptive. An input is absent if the ....
....to suspension automata. A suspension automaton # p of an LTS p is obtained by determinising p and adding the necessary # transitions. The suspension traces of p coincide with the traces of its suspension automaton # p . In addition, for all # # L # , out(# p after #) out(p after #) see [14] for the proof. Therefore checking (strong)confor can be easily reduced to checking trace inclusion on suspension automata. Only traces without # transitions are checked for confor, while all the traces of a suspension automaton are checked for strongconfor. A verification tool VeriConf has been ....
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software Concepts and Tools, 17:103--120, 1996. 16
Testing Timed Automata - Springintveld, Vaandrager, D'Argenio (1997) (14 citations) (Correct)
....the automatic generation of timed tests, our model allows a loose coupling of inputs and outputs, unlike the usual Mealy style finite state machines where inputs and outputs occur simultaneously in a single transition. A similar (even more flexible) modeling of input and outputs is presented in [Tre96b, Tre96a, FJJV96] but this approach does not deal with time. We provide a method to derive a complete test suite in the style of well known finite state machine based methods (see, e.g. Cho78, CVI89, ADLU91] The main problem involved is that in general the state space of a timed automaton is ....
J. Tretmans. Test generation with inputs, outputs, and repetitive quiescence. Software-- Concepts and Tools, 17:103--120, 1996.
Component Based Testing with ioco - van der Bijl, Rensink, Tretmans (2003) Self-citation (Tretmans With) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software---Concepts and Tools, 17(3):103--120, 1996.
Compositional Testing with IOCO - Machiel Van Der Self-citation (Tretmans With) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software---Concepts and Tools, 17(3):103--120, 1996.
Model Based Testing with Constraint Logic Programming.. - Pretschner, Lötzbeyer (2001) (1 citation) Self-citation (With) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software--Concepts and Tools, 17(3):103--120, 1996.
Compositional Testing with IOCO - van der Bijl, Rensink, Tretmans (2003) (1 citation) Self-citation (Tretmans) (Correct)
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Tretmans, J.: Test generation with inputs, outputs and repetitive quiescence. Software--- Concepts and Tools 17 (1996) 103--120
On-the-Fly Formal Testing of a Smart Card Applet - van Weelden, Frantzen.. (2004) Self-citation (Tretmans) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software---Concepts and Tools, 17(3):103--120, 1996.
Queued Testing of Transition Systems with Inputs and Outputs - Petrenko, Yevtushenko Self-citation (With Outputs) (Correct)
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J. Tretmans, Test Generation with Inputs, Outputs and Repetitive Quiescence, Software-Concepts and Tools, 17(3), 1996.
Compositional Testing with IOCO - Machiel Van Der Self-citation (Tretmans) (Correct)
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Tretmans, J.: Test generation with inputs, outputs and repetitive quiescence. Software--- Concepts and Tools 17 (1996) 103--120
Classical Search Strategies for Test Case Generation with.. - Pretschner (2001) (6 citations) Self-citation (With) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software--Concepts and Tools, 17(3):103--120, 1996.
Component Based Testing with ioco - van der Bijl, Rensink, Tretmans (2003) Self-citation (Tretmans With) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software---Concepts and Tools, 17(3):103--120, 1996.
Formal Test Automation: A Simple Experiment - Belinfante, Feenstra, de.. (1999) (5 citations) Self-citation (Tretmans) (Correct)
....of states that the specification might be in. It o#ers functions to generate inputs (stimuli) for the implementation and to check outputs (observations) from the implementation. Our current implementation of the Primer implements the test derivation algorithm for the implementation relation ioco [12]. Since this algorithm does not contain test data selection criteria, test selection is currently implemented by making random choices using a random number generator. The seed of this generator is a parameter of the Primer. DRIVER. The Driver is the central component of the tool architecture; it ....
....It is responsible for sending inputs to and receiving outputs from the SUT on request of the Driver. The Adapter is also responsible for encoding and decoding of abstract actions to concrete bits and bytes, and vice versa. This also involves mapping of the quiescent action # onto time outs, see [12]. We currently use two interfaces between Driver and Adapter. In our current on the fly tester we use a simple (ad hoc) interface based on calling 6 conventions for the (TCL) functions that implement the en decoding functions. We are in the process of replacing this interface by the Generic ....
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software---Concepts and Tools, 17(3):103--120, 1996.
TGV: theory, principles and algorithms - Jard, Jeron (2002) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software - Concepts and Tools, 17, 1996.
Model Based Testing for Real: The Inhouse Card Case Study - Pretschner, Slotosch.. (2001) (1 citation) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software-- Concepts and Tools, 17(3):103--120, 1996.
Unknown - Testing Reactive Systems (2004) (Correct)
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J. Tretmans Test generation with inputs, outputs and repetive quiscence. Software-- Concepts and Tools, 17(3):103--120, 1996.
Testing Reactive Systems with GAST - Koopman, Plasmeijer (2004) (Correct)
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J. Tretmans Test generation with inputs, outputs and repetive quiscence. Software--Concepts and Tools, 17(3):103--120, 1996.
Testing Timed Automata - Springintveld, Vaandrager, D'Argenio (1997) (14 citations) (Correct)
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J. Tretmans. Test generation with inputs, outputs, and repetitive quiescence. Software-- Concepts and Tools, 17:103--120, 1996.
Protocol Techniques for Testing Radiotherapy Accelerators - Turner, Bing (2002) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software Concepts and Tools, 17:103--120, 1996.
Systematic Testing of Radiotherapy Accelerators - Turner, Bing (2002) (Correct)
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J. Tretmans. Test generation with inputs, outputs and repetitive quiescence. Software Concepts and Tools, 17:103--120, 1996.
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