K. Kuchcinski, "Embedded System Synthesis by Timing Constraint Solving", Proc. Int. Symp. on Syst. Synth., 1997, pp. 50-57. Home/Search Document Not in Database Summary Related Articles Check |
This paper is cited in the following contexts:
Multiobjective Synthesis of Low-Power Real-Time Distributed.. - Dick (2002) (1 citation) (Correct)
.... of incrementally, dynamically reconfigurable hardware [71] Karkowski and Corporaal allocated and partitioned an ANSI C specification among homogeneous processors on a single chip [72] Kuchcinski used constraint logic programming to minimize the price of an embedded system under time constraints [73]. The computational complexity of his algorithm may be arbitrarily reduced, as long as one is willing to tolerate sub optimal solutions. We believe this is the most formal existing approach to solving a problem similar to the hardware software co synthesis problem that, at the same time, remains ....
K. Kuchcinski, "Embedded system synthesis by timing constraints solving," in Proc. of Int. Symp. on System Synthesis, pp. 50--57, Sept. 1997.
Allocation and Scheduling of Conditional Task Graph in.. - Xie, Wolf (2001) (4 citations) (Correct)
....graph model that has no control dependency information can only capture data dependency in the system specification. Recently, some researchers in co synthesis domain have tried to use conditional task graph to capture both data dependencies and control dependencies of the system specification [7][8]. However, because of the time complexity, their algorithms are not very suitable for large task graphs or to be used in the inner loop of the co synthesis procedure. This paper describes an allocation and scheduling algorithm that is used in the inner loop of our co synthesis process of ....
....in the task graph. Their algorithm has two limitations: 1. They assume that the allocation of the tasks is fixed for each task; 2. Their algorithm has to enumerate all possible schedules for all condition combinations, thus it is not suitable for control intensive application. Kuchcinski et al. [8] used constraint programming techniques to model the scheduling problem of conditional task graphs, and then used commercial constraints solver to find the solution. This approach does not take advantage of heuristics unique to co synthesis. 3. Problem formulation Many real time applications are ....
K.Kuchcinski, "Embedded system synthesis by timing constraint sovling", Proc. Int.Symp.on Syst.synth,pp.50-57,1997.
Scheduling and Communication Synthesis for Distributed Real-Time.. - Pop (2000) (2 citations) (Correct)
....of processes, and allocation of system components, are formulated as a mixed integer linear programming (MILP) problem. A disadvantage of this approach is the complexity of solving the MILP model. The size of such a model grows quickly with the number of processes and allocated resources. In [Kuc97] a formulation using constraint logic programming has been proposed for similar problems. In all the previous approaches process interaction is only in terms of dataflow. However, when including control dependencies significant improvements in the quality of the resulting schedules can be ....
K. Kuchcinski, "Embedded System Synthesis by Timing Constraint Solving", Proceedings of the International Symposium on System Synthesis, 50-57, 1997.
Efficient System Exploration and Synthesis of.. - Silva, Jr.. (1998) (5 citations) (Correct)
....processing applications. On the other hand, approaches intended for reactive control systems lack support for complex types and their data (storage and transfers) Work on system synthesis of protocol applications has been dealing with very particular aspects, e.g. solving timing constraints [9] and memory allocation for minimizing memory interface traffic during HW SW partitioning [8] No global approach exists. In the SW community, distributed programming languages are used for programming general purpose multiprocessor systems or distributed networks of workstations [1, 10, 14] They ....
Kuchcinski et al. Embedded system synthesis by timing constraint solving. In Proc. of the Intnl. Symposium on System Synthesis. Antwerp, Belgium, 1997.
Scheduling with Buss Access Optimization for Distributed.. - Eles, al. (Correct)
No context found.
K. Kuchcinski, "Embedded System Synthesis by Timing Constraint Solving", Proc. Int. Symp. on Syst. Synth., 1997, pp. 50-57.
Memory Aware Task Assignment and Scheduling for Multiprocessor.. - Szymanek (2001) (1 citation) (Correct)
No context found.
Kuchcinski, K., "Embedded system synthesis by timing constraints solving", in Proc. 10th International Symposium on System Synthesis, 1997, Page(s): 50-57.
Digital Systems Design Using Constraint Logic Programming - Szymanek, Gruian, Kuchcinski (2000) (1 citation) (Correct)
No context found.
Kuchcinski K.: Embedded System Synthesis by Timing Constraints Solving, Proc. of the 10th Int. Symposium on System Synthesis, Sep. 17-19, 1997, Antwerp, Belgium
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