Citations: The effects of mispredictedpath execution on branch prediction structures - Jourdan, Hsing, Stark, Patt (ResearchIndex)

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S. Jourdan, T.-H. Hsing, J. Stark, and Y. N. Patt. The effects of mispredicted-path execution on branch prediction structures. In Proceedings of the 1996.

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Variability in Architectural Simulations of Multi-threaded.. - Alameldeen, Wood (2003) (8 citations) (Correct)

.... models a four wide superscalar processor, with an eleven stage pipeline (fetch (3) decode (3) schedule (1) execute (1 or more) and retire (3) TFsim models a 1 KB YAGS direct branch predictor [11] a 64 entry cascaded indirect branch predictor [9] a 64 entry return address stack predictor [14], and a 64 entry reorder buffer (unless otherwise specified) 3.3. Introducing Variability As described in Section 2.1, workloads exhibit space variability on real systems due to small timing variations. Our simulator, however, is deterministic: it produces the same execution path for each ....

Stephan Jourdan, Tse-Hao Hsing, Jared Stark, and Yale N. Patt. The Effects of Mispredicted-Path Execution on Branch Prediction Structures. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, pp. 58--67, October 1996.

Optimizations Enabled by a Decoupled Front-End Architecture - Reinman, Calder, Austin (2001) (4 citations) (Correct)

....the fetch block fall through address. The meta predictor and bimodal predictor values are not updated speculatively, since they are state machines and not history registers. The front end can only assume it made the correct prediction and thus reinforce bimodal predictions. It has been shown in [18] that better performance results when such predictor updates are delayed until the result of the branch outcome is known, i.e. at execution or retirement. 5.3 Functionality of the 2 Level FTB The FTQ helps enable the building of a multi level branch predictor, since the latency of the ....

S. Jourdan, T. Hsing, J. Stark, and Y. Patt. The effects of mispredicted-path execution on branch prediction structures. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, October 1996.

Microarchitectural and Compile-Time Optimizations for.. - Kalamatianos (2000) (1 citation) (Correct)

....address with the current return invocation. Due to its high prediction accuracy, a RAS is preferred when predicting the addresses of return instructions. Several studies have concentrated on techniques of properly updating a RAS and or recovering its correct state during speculative execution mode [127, 128]. In our work, we will not address issues related with the predictability of return instructions. In [129] the Case Block Table (CBT) is proposed for predicting the next target of a switch statement. If the compiler issues an indirect jump to implement the control transfer for a switch ....

....that predicts the outcome of conditional branches. The remaining machine configurations use the same BTB for conditional and direct unconditional branches, but a different IB predictor for indirect branches. Return instructions are predicted with a fully check pointed RAS in all configurations [128]. In order to have a fair comparison in terms of hardware cost, the total number of predictor table entries is the same for both the base machine and the machines employing IB predictors. If the base machine has a BTB with n entries, a machine using an IB predictor will allocate n 2 entries to ....

S. Jourdan, T.H. Hsing, J. Stark, and Y.N. Patt. The Effects of Mispredicted Path Execution on Branch Prediction Structures. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, pages 58--67, October 1996.

Indirect Branch Prediction using Data Compression Techniques - Kalamatianos, Kaeli (1999) (2 citations) (Correct)

....Due to its high prediction accuracy, a RAS is considered the standard unit for predicting the addresses of return instructions in modern microprocessors. Several studies have concentrated on techniques of properly updating a RAS and or recovering its correct state during speculative execution mode [16, 17]. In our work, we will not address issues related with the predictability of return instructions. In [18] the Case Block Table (CBT) is proposed for predicting the next target of a switch statement. Depending on compiler heuristics, an indirect jump may be used to implement the control transfer ....

S. Jourdan, T.H. Hsing, J. Stark, and Y.N. Patt. The Effects of Mispredicted Path Execution on Branch Prediction Structures. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, pages 58--67, October 1996.

Mispredicted Path Cache Effects - Combs, Combs, Shen (1999) (2 citations) (Correct)

....instructions beyond conditional branches. If these speculative instructions are determined to be on a mispredicted path, they must be invalidated and removed from the machine. Mispredicted instructions can affect many parts of the machine, particularly the functional units, branch predictors [5], and caches. This research focuses on the effects mispredicted path instructions have on the cache hierarchy, due to the increased number of instruction and data references. Previous research in this area showed that mispredicted path references have a prefetching effect, but the methods that ....

S. Jourdan, T. Hsing, J. Stark, and Y. Patt. "The Effects of Mispredicted-Path Execution on Branch Prediction Structures." Conference on Parallel Architectures and Compilation Techniques (PACT), October 1996.

The Use of Multithreading . . . - Zilles (Correct)

....with 2 14 entry table, 2 12 exceptions with 6 bit tags, with perfect branch target prediction. Indirect branches predicted by an cascaded indirect predictor [6] with 2 8 entry table, with 2 10 exceptions. Returns are predicted by a 64 entry checkpointing return address stack (RAS) [10]. Pipelining 3 cycles for Fetch, 1 cycle Decode, 1 cycle Schedule, 2 cycle Register Read for nominal 7 stages between Fetch and Execute. Functional Units (Latency) 8 integer ALUs (1) 3 integer mult div (3 12) 3 Float Add Mult (2 4) 1 Float Div SQRT (12 26) 3 Load Store ports(3 2) for an ....

S. Jourdan, T. Hsing, J. Stark, Y. N. Patt. The Effects of Mispredicted-Path Execution on Branch Prediction Structures. International Journal of Parallel Programming, vol 25, num 5, 1997.

The Block-based Trace Cache - Black (1999) (19 citations) (Correct)

....(gshare [10] or a combination of previous block ids and branch history bits (next trace predictor of [8] Since the fetch unit can track block id history and branch history, potentially speculative previous block ids and branch history bits can be used by the hashing function. As shown in [9], speculative branch history can be corrupted due to mispredictions; a simple recovery and cleanup mechanism is necessary. The associativity and size of the trace table are explored in Section 5. However, detailed exploration of the huge design space for the next trace predictor is left for future ....

S. Jourdan, T. Hsing, J. Stark, and Y. Patt, "The Effects of Mispredicted-Path Execution on Branch Prediction Structures." In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, October 1996

A Scalable Front-End Architecture for Fast Instruction.. - Reinman, Austin, Calder (1999) (16 citations) (Correct)

....they provide detailed analysis of their design in [26] The meta predictor, bimodal, and 2 bit pattern history table values are not updated speculatively. The front end can only assume it made the correct prediction and thus reinforce bimodal or pattern history predictions. It has been shown in [13] that better performance results when the meta predictor and 2 bit PHT updates are delayed until the result of the branch outcome is known, i.e. at execute or retirement. Since the FTB can make predictions far beyond the current PC, it can pollute the return address stack if it predicts multiple ....

S. Jourdan, T. Hsing, J. Stark, and Y. Patt. The effects of mispredictedpath execution on branch prediction structures. In Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, October 1996.

Wrong Path Events: Exploiting Unusual and Illegal.. - Misprediction.. Self-citation (Patt) (Correct)