J-M. Chang, M. Pedram,"Power Efficient Register Assignment ", CENG Technical Report 95-03, University of Southern California, Mar. 1995. Home/Search Document Not in Database Summary Related Articles Check |
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Register Allocation and Binding for Low Power - Chang, Pedram (1995) (17 citations) Self-citation (Chang Pedram) (Correct)
....i in the data flow graph has an interval (birth time i ; death time i ) associated with it. Each open interval i corresponds to a vertex i in G0 = V,A) There is a directed arc (u; v) 2 A if and only if intervalu intervalv = and death timeu birth timev . All proofs can be found in [2]. Theorem 3.1 Given a data flow graph without loops and branches, the compatibility graph G0 = G(V,A) for register allocation problem is acyclic. Definition 3.2 [5]An undirected graph G = V,E) is a comparability graph if there exists an orientation (V,F) of G satisfying F F Gamma1 = F ....
....[11] or simply by finding the maximum number of arcs that cross any c step boundary. In most cases, the kmin found by the left edge algorithm is equal to the kmin for max cost flow. However, in some pathological cases, the two values are not the same. In that case, a post processing step is needed [2]. 2 The time complexity for the max cost flow algorithm is O(km 2 ) according to [4] where m = 2 Theta j V j 2 for the graph G0 = G(V; A) and k is the flow valus. Conditional branches can be easily handeled in our system by relaxing the conditional data flow graph into several ....
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J-M. Chang, M. Pedram,"Power Efficient Register Assignment ", CENG Technical Report 95-03, University of Southern California, Mar. 1995.
Energy Minimization Using Multiple Supply Voltages - Chang, Pedram (1997) (61 citations) Self-citation (Chang Pedram) (Correct)
....operations. This algorithm uses conventional techniques to detect operation compatibility and mutual exclusiveness of operations (as in parallel branches) We use a scheme similar to that of [14] for minimum energy module binding using a max cost network flow algorithm. Details can be found in [15]. V. Functionally Pipelined Data path A. Background In a functionally pipelined design, several instances of the execution of a data flow graph are overlapped in time. The time domain is discretized into time steps (for a given length of a time step) Unlike a structural pipelining, there is no ....
J.-M. Chang and M. Pedram, "Power Efficient Register Assignment, " Tech. Rep. CENG 95-03, University of Southern California, 1995.
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