Muller and Kamins, Device Electronics for Integrated Circuits, John Wiley & Sons, 1986.  Home/Search   Document Not in Database   Summary   Related Articles   Check

....is the 9 first level, the capacitance can then be neglected and the line can be modeled as a series of a resistance and an inductance. This is exactly the condition in which the model reported in the following paragraphs has been developed. Using indeed a substrate doped p type with NA = cm 3 [27], for example, its resistivity will be as in equation (4) qNA p ) 1 6.5 # cm (4) and as a consequence the relaxation frequency computed using the expression in (1) will be as in (5) f r = 1.23 GHz (5) Figure 3 shows the frequency spectrum of the noise signals traveling on the ground and ....

R. Muller and T.I.Kamins. Device Electronics for Integrated Circuits. John Wiley and Sons, Inc., 1977.

....sub threshold currents turn out to be the main contributions, which implies that they dominate the current behaviour in today s deep sub micron technologies. Our work is centered on the study of these sub threshold currents. For an NMOS device, the quiescent current due to subthreshold conduction [11] follows this simplified relationship: W , t, I, b,t, or Cox exp[ t ) where Co is the gate capacitance per unit area, W is the channel width, L is the channel length and Vtt, is the subthreshold volge. These fo pameters e affected by their tolerance, therefore, we need to know their ....

R.S. Muller and T.I. Kamins, "Device Electronics for Integrated Circuits", Second Edition. Wiley&Sons, 1986.

....CL is the capacitance that is switched, and Vaa and V are the supply and transistor threshold voltages, respectively, and is the velocity saturation index that assumes a value close to 2 for long channel transistors. For shorter channel lengths however, is close to 1 due to velocity saturation [12]. For simplicity, we will assume that =1 in the following analysis. Let the unscaled voltages be denoted by Vaav, Vwv and the scaled voltages be denoted by Vaas, Vw s . From equation(1) in order to achieve the same delay after voltage scaling, the following equation must be satisfied: 2) ....

R. S. Muller and T. I. Kamins, Device Electronics for Integrated Circuits. John Wiley and Sons, 2 ed., 1986.

....APPENDIX A. GP0 MOSFET Models Here we describe the MOSFET large and small signal models used in our method. The model, which we refer to as GP0, is essentially the standard long channel square law model described in, 3] and [41] This model can be inadequate for short channel transistors [70], 91] in which case better models can be developed that still allow optimization via geometric programming (see the Appendix, Section B) 1) Large Signal Models: Correct operation of the op amp requires all transistors to be in saturation. For an NMOS transistor this means (47) When the NMOS ....

R. S. Muller and T. H. Kamins, Device Electronics for Integrated Circuits, 2nd ed. New York: Wiley, 1986.

....comments. 38 A MOSFET models In this section we describe the MOSFET large and small signal models used in our method. The model is very similar to the standard long channel square law model described in, e.g. 83, 84] This model can be inadequate for short channel transistors (see, e.g. [85, 86]) in which case better models can be developed that still allow optimization via geometric programming; see x7.5. PMOS NMOS D D G G S S I D I D Figure 11: Transistor symbols A.1 Large signal models Correct operation of the op amp requires all transistors to be in saturation. For an NMOS ....

R. S. Muller and T. H. Kamins. Device Electronics for Integrated Circuits. John Wiley & Sons, 2nd. edition, 1986.

....designs incorporate overhead voltage margins to guarantee proper operation under worst case conditions. This is due to the circuit delay s strong dependence on process parameters and temperature as shown by the equations for device transconductance, and threshold voltage, V TH , below. [33] (2 2) 2 3) Device transconductance strongly depends on oxide thickness, C ,whichcanvaryby 12 between process runs . Mobility and threshold voltage both have strong dependence on temperature which can significantly degrade circuit speed. Performance dependence on process and temperature ....

R.S. Muller, et. al., Device electronics for integrated circuits, John Wiley and Sons, 1986.

....readership. Keywords Molecular electronics, nanoelectronics, quantum dots, quantum effect devices, resonant tunneling, single electron transistors. I. INTRODUCTION For the past 40 years, electronic computers have grown more powerful as their basic subunit, the transistor, has shrunk [1]. However, the laws of quantum mechanics and the limitations of fabrication techniques may soon prevent further reduction in the size of today s conventional fieldeffect transistors (FET s) Many investigators in the field of next generation electronics project that during the next 10 to 15 years, ....

R. S. Muller and T. I. Kamins, Device Electronics for Integrated Circuits. New York: Wiley, 1986.

.... adhesion to most dielectrics and can drift very quickly through them under electric bias to cause metal to metal shorts and to reach the underlying Si substrate where they can diffuse very rapidly through Si interstitial sites and form deep level acceptors that can degrade device performance [24]. This is then followed by Cu deposition (usually by electroplating) Next, the unwanted Cu and barrier layers outside the trenches are removed using chemical mechanical polishing (CMP) 25] Finally, a layer of silicon nitride is deposited which passivates the top surface of the Cu metal in the ....

R. S. Muller and T. I. Kamins, Device Electronics for Integrated Circuits, 2nd ed. New York: Wiley, 1986, pp. 1--56.

....shifts, only the threshold voltage of the NMOS transistor in the second inverter in the chain was shifted. The amount of the threshold voltage shift in a damaged device could grow larger than the values simulated here if the gate leakage current caused by hot electron injection stays longer [20]. Tables 10 and 11 show the simulation results. The last three columns in Tables 10 and 11 show the delay ratios. In this subsection, the delay ratio is the ratio between the propagation delay of a faulty circuit with threshold voltage shifts and that of a fault free circuit. The delay measured in ....

Muller, R.S., and T.I. Kamins, Device Electronics for Integrated Circuits , Second Edition, John Wiley & Sons, Inc., 1986.

....Fig. 4 shows the values of the breakdown and full depletion voltage versus fluence. The theoretical formula of V a break (avalanche breakdown) for a one sided ideal step junction has the form: V a break = ffl Si ffl 0 E 2 1 2qN eff ; where E 1 is the critical value of the electric field [15]. Obviously, this formula does not hold for such a complex structure as a microstrip detector, but the main feature, that V break is inversely proportional to N eff , is still valid. Fig. 4 shows that the breakdown voltage decreases fluence, while the full depletion voltage exhibits the opposite ....

R. S. Muller T. I. Kamins, Device electronics for integrated circuits, John Wiley and Sons, 1977.

....above or below the n diffusion p substrate junction or diffusing from neighbouring photodiodes, will be swept away from the n diffusion region by the junction field, or be bypassed to the power supply. III. DEVICE FABRICATION The photodiode array was fabricated using a bipolar process in silicon [16]. The Fabry Perot etalons were added in a post process module. The post process module, which was used to fabricate the 16 etalons, each with a different thickness, requires further explanation. The formation of the Fabry Perot etalon starts with the deposition of a 20nm Al layer after completion ....

R. S. Muller, T. I. Kamis, "Device electronics for integrated circuits," John Wiley & Sons, 1986.

.... rising (15) where 1 was the first moment of the network obtained by replacing each transistor by a resistor of resistance: R eff = 2 k(V dd Gamma V t ) 16) where k = C ox W=L is the device transconductance parameter and L; W; C ox ; andV t are parameters of the quadratic MOS model[MK77, HJ83] However, switch level simulators do not require the computation of the waveform but rather only the delay to the 50 point. For linear networks, the delay can be computed 6 For simplicity Horowitz normalized the logic swing (usually 5 volts) to 1 volt. CHAPTER 2. PREVIOUS WORK IN ....

....because the effort required to compute if and when a piecewise linear device changes regions is proportional to the number of hyperplanes bounding the current region. 5 The variation of drain current with the drain source voltage in the saturation region is caused by channel length modulation[MK77] 6 The dependence of the model s threshold upon the drain voltage is explained in Appendix A. CHAPTER 3. PIECEWISE LINEAR MODELS 31 3.4.3 Choosing Parameters In exchange for its simplicity, the Level 1 piecewise linear MOS model loses the ability to duplicate the behavior of a SPICE model ....

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Richard S. Muller and Theodore I. Kamins. Device Electronics for Integrated Circuits. John Wiley & Sons, Inc, New York, 1977.

....is scattering caused by ionized impurities becoming important at very low temperatures, 4K, due to slower carrier thermal velocity. Since these effects track temperature differently, there is a point at which the effective mobility is maximum. Interestingly enough, this point is very close to 77K [34] [6] 14] 22] At low fields, low VDS experimenters found that mobility and hence conductance was 4 times higher at 77K than at room temperature [15] At high fields, mobility was only 1.7 times that of room temperature. This is because at high electric fields, VDS on the order of few volts, the ....

Muller, R.S., and Kamins T.I., Device Electronics for Integrated Circuits, Second Edition, pp. 28-28, John Wiley & Sons, 1986.

....overlap capacitances per micron of gate width versus minimum channel length (transistor assumed in saturation region) The ratio between minimum gate length and oxide thickness is between 40 and 50 for different technologies. Since mobility at low field is a weak function of doping concentration [7], the transistor s transconductance coefficient at low field should scale inversely with the oxide thickness, and hence channel length, as shown by the dashed curve in Fig. 1. In analog and RF designs, however, input transistors are usually biased at 200 300 mV of gate overdrive . The ....

....scales. The resulting improvement in the ratio, although beneficial to current reduction in the same trend as shown in Fig. 7, degrades linearity, as indicated by (12) This degradation is exacerbated by the worsening of , which is believed to be inversely proportional to the oxide thickness [4] [7]. The parameter , or its equivalent in various SPICE models, is often not given enough attention by people who measure the transistor parameters, so that reliable measured data are hard to come by. The inverse proportionality of to oxide thickness, although not always corroborated by foundry data, ....

R. Muller and T. Kamins, Device Electronics for Integrated Circuits, 2nd ed. New York: Wiley, 1986.

....modeled delays in CMOS circuits [8] However, minimum device channel lengths, L MIN , have scaled below 1 micron, degrading the performance of the device due to velocity saturation of the channel electrons. This phenomenon occurs when the electric field (V DD L MIN ) in the channel exceeds 1V um [10]. 4) The change in performance can be characterized by the short channel or velocity saturated delay model shown in Equation 4. I AVE is the average current being driven onto C L , and is proportional to device width W, technology constant k V , and to first order, V DD . V T is the threshold ....

R. Muller and T. Kamins, Device Electronics for Integrated Circuits, New York: Wiley, 1986.

....i.e. 5 V. 2.4.1 Supply Voltages Generation The avalanche breakdown of a reverse biased pn junction may be exploited as a voltage reference or for DC level shifting. Although the breakdown mechanism of the fabricated junction is the avalanche multiplication rather then the Zener breakdown [11, 10], such devices are known as Zener diodes. Zener diodes may be implemented by a npn transistor; the base emitter junction, that has a reverse breakdown voltage VZ = VEB in the range of 6 8 V. Figure 6 shows the basic R CBJT 5 V 2.5 V 2.5 V Figure 5: Analog to Digital Output Conversion. ....

R.S. Muller, T.I. Kamins, Device Electronics for Integrated Circuits, 2nd ed., John Wiley & Sons , 1986.

....hole mobilities, and D n and D p are the diffusion coefficients. The mobilities n and p may be computed as nonlinear functions of the electric field E, i.e. n = n 0 1 n 0 E v sat fi # Gamma(1=fi) where v sat and fi are constants and n 0 is a doping dependent mobility [30]. The diffusion constants D n and D p are related to the mobilities by kT q (the thermal voltage) in a pair of equations known as the Einstein relations [15] D n = kT q n and D p = kT q p : The drift diffusion approximations (12) and (13) are typically used to eliminate the current ....

R. S. Muller and T. I. Kamins, Device Electronics for Integrated Circuits, John Wiley and Sons, New York, 1986.

....the minimum device channel length, L MIN , to below 1 micron (which is common in today s process technology) degrades the performance of the device due to velocity saturation of the channel electrons. This phenomenon occurs when the electric field (V DD L MIN ) in the channel exceeds 1V um [6]. Power V DD f CLK a i C L i DV i i 1 = N = Power V DD 2 f CLK C EFF (EQ 4) The change in performance can be analytically characterized by what is known as the short channel or velocitysaturated delay model shown in Equation 4. I AVE is the average current ....

R. Muller, T. Kamins, Device Electronics for Integrated Circuits, Wiley, New York, 1986

....and hole mobilities, and Dn and D p are the diffusion coefficients. The mobilities n and p may be computed as nonlinear functions of the electric field E, e.g. n = n0 1 n0 E v sat fi # Gamma(1=fi) where v sat and fi are constants and n0 is a doping dependent mobility [16]. The diffusion constants Dn and D p are related to the mobilities by the Einstein relations Dn = kT q n and D p = kT q p : The drift diffusion approximations (4) and (5) are typically used to eliminate the current densities J n and J p from the continuity equations (2) and (3) leaving a ....

R. S. Muller and T. I. Kamins, Device Electronics for Integrated Circuits. New York: John Wiley and Sons, 1986.

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Muller and Kamins, Device Electronics for Integrated Circuits, John Wiley & Sons, 1986.

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R. Muller and T. Kamins, Device Electronics for Integrated Circuits. New York, NY, USA: John Wiley and Sons, second edition ed., 1986.

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R. S. Muller and T. I. Kamins. Device electronics for integrated circuits. John Wiley & Sons, 1986.

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R. S. Muller and T. I. Kamins, Device Electronics for Integrated Circuits. New York: Wiley, 1986.

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R.S. Muller and T.I. Kamins, Device Electronics for Integrated Circuits, New York: John Wiley and Sons, Inc., 1986.

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R. S. Muller and T. I. Kamins, Device electronics for integrated circuits. Wiley, New Yo r k 2 ed., 1986.

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R. S. Muller and T. I. Kamins, Device electronics for integrated circuits. Wiley, New Yo r k 2 ed., 1986.

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R. S. Muller and T. I. Kamins, Device Electronics for Integrated Circuits, 2nd ed. New York: Wiley, 1986, ch. 10.

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R. S. Muller and T. I. Kamins, Device electronics for integrated circuits. Wiley, New Yo r k 2 ed., 1986.

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R.S. Muller and T.I. Kamins. Device Electronics for Integrated Circuits. Wiley, 1986.

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R. S. Muller and T. I. Kamis, Device Electronics for Integrated Circuits, New York: Wiley, 1986.

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R. S. Muller and T. H. Kamins. Device Electronics for Integrated Circuits. John Wiley & Sons, 2nd. edition, 1986.

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R. Muller and T. Kamins, Device Electronics for Integrated Circuits, 2nd ed., John Wiley and Sons, 1986.

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Muller, R.S., and T.I. Kamins, Device Electronics for Integrated Circuits, Second Edition, John Wiley & Sons, Inc., 1986.

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