| Gary, S., Dietz, C., Eno, J., Gerosa, G., Park, S., and Sanchez, H. The PowerPC TM 603 microprocessor: a low-power design for portable applications. Proceedings of the IEEE International Computer Society Conference (COMPCON 94), San Francisco, CA, 307--315, February 1994. |
....be reduced by slowing the clock. Turning off a processor has little downside; no excess energy is expended turning the processor back on, the time until it comes back on is barely noticeable, and the state of the processor is unchangedfrom it turning off and on, unless it has a volatile cache [29]. On the other hand, there is a clear disadvantage to reducing the clock rate: tasks take longer. There may also be a slight delay while the processor changes clock speed. Reducing the power consumption of the processor saves more than just the energy of the processor itself. When the processor is ....
Gary, S., Dietz, C., Eno, J., Gerosa, G., Park, S., and Sanchez, H. The PowerPC TM 603 microprocessor: a low-power design for portable applications. Proceedings of the IEEE International Computer Society Conference (COMPCON 94), San Francisco, CA, 307--315, February 1994.
....from a low power mode are typically low. For instance, the AT T Hobbit and certain versions of the MC68030 and MC68040 use static logic so that most of their state can be retained when the clock is shut down [15] Also, the PowerPC 603 can exit the low power Doze mode in about ten system clocks [4]. Because of the short delay and low energy cost for entering and leaving a low power state, the optimal CPU power management strategy is trivial: turn off the CPU whenever there is no useful work to do. An opportunityfor such a strategy is described by Srivastava et al. 15] who point out that ....
S. Gary, C. Dietz, J. Eno, G. Gerosa, S. Park, and H. Sanchez. The PowerPC TM 603 microprocessor: a low-power design for portable applications, in Proceedings of the IEEE International Computer Society Conference, San Francisco, CA, 1994, pp. 307--315.
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